許鈞瓏
Overview
Works: | 1 works in 0 publications in 0 languages |
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Titles
三維積體電路矽穿孔之內建自我測試與內建自我修復研究設計 = = Built-In Self-Test and Built-In Self-Repair Design for TSV-based 3D IC /
by:
黃虹諺; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
DJM碼之低功率二維DCT電路設計 = = Design a Low-Power 2D-DCT by using DJM Codes /
by:
孫士傑; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
三維現場可程式邏輯陣列之交錯式開關盒佈局設計 = = Interlaced Switch-Boxes Placement for Three-DimensionalFPGA Architecture Design /
by:
李風潮; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
三維晶片網路內建自我測試策略 = = A BIST Strategy for 3D Network-on-Chip Application /
by:
許鈞瓏; 詹旻儒
(Language materials, printed)
高可靠度自我偵測/回復之靜態隨機存取記憶體架構設計 = = High Reliability Built-in Self Detection/Recovery Architecture Design for SRAM /
by:
謝耀緯; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
高效能電流感測記憶體之測試架構設計 = = High Performance Testing Architecture Design Based on CMSA SRAM /
by:
何銘宏; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
應用於位元率失真度最佳化之適應性量化架構設計 = = Adaptive Quantization Parameter Based Prediction Architecture Design for Rate Distortion Optimization /
by:
金上強; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
應用於三維現場可程式邏輯陣列之高效能繞線開關設計 = = High-Performance Routing Switch Design for 3D FPGA Applications /
by:
許鈞瓏; 國立東華大學電機工程學系; 施博文
(Language materials, printed)
應用於影像編碼系統之預測演算法與測試架構設計 = = Prediction Algorithm and Testing Architecture Designs for Video Coding Systems /
by:
許鈞瓏; 國立東華大學電機工程學系; 鄭昌信
(Language materials, printed)
移動估測計算陣列之可測試性設計與容錯分析 = = Testable Design and Tolerance Analysis of Motion Estimation Computing Array /
by:
楊震仁; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
以餘商運算編碼為基礎之可測試性二維離散餘弦轉換電路 = = Design for Testability of 2D-DCT Based on RQ Codes /
by:
蔡沐昌; 許鈞瓏; 國立東華大學電機工程學系
(Language materials, printed)
JPEG 2000 編碼器之錯誤容忍設計 = = Error Tolerance Scheme in JPEG 2000 Encoder /
by:
許鈞瓏; 國立東華大學電機工程學系; 黃毓生
(Language materials, printed)
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