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Three-dimensional integrated circuit...

Friedman, Eby G.

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Three-dimensional integrated circuit design

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Three-dimensional integrated circuit design/ Vasilis F. Pavlidis, Eby G. Friedman.
作者:	Pavlidis, Vasilis F.,
其他作者:	Friedman, Eby G.
出版者:	Amsterdam ;Morgan Kaufmann, : c2009.,
面頁冊數:	xv, 309 p. :ill. ;25 cm.
叢書名:	The Morgan Kaufmann series in systems on silicon
內容註:	Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.
標題:	Integrated circuits - Design and construction. -
電子資源:	http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780123743435An electronic book accessible through the World Wide Web; click for information
電子資源:	http://www.sciencedirect.com/science/book/9780123743435An electronic book accessible through the World Wide Web; click for information
ISBN:	0123743435

Three-dimensional integrated circuit design
Pavlidis, Vasilis F.,1976-

Three-dimensional integrated circuit design[electronic resource] /Vasilis F. Pavlidis, Eby G. Friedman. - Amsterdam ;Morgan Kaufmann,c2009. - xv, 309 p. :ill. ;25 cm. - The Morgan Kaufmann series in systems on silicon.

Includes bibliographical references (p. 289-303) and index.

Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.

With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance.

Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2009.

Mode of access: World Wide Web.

ISBN: 0123743435

Source: 152801:152956Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:

658490
Integrated circuits
--Design and construction.Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: TK7874 / .P39 2009

Dewey Class. No.: 621.3815

Three-dimensional integrated circuit design
LDR:02668cam 2200337 a 45 001 893422
003 OCoLC
005 20101126
006 m d
007 cr cn|||||||||
008 101126s2009 ne a ob 001 0 eng d
020 $a 0123743435
020 $a 9780123743435
029 1 $a NZ1 $b 13078159
035 $a (OCoLC)318353703
035 $a ocn318353703
037 $a 152801:152956 $b Elsevier Science & Technology $n http://www.sciencedirect.com
040 $a OPELS $b eng $c OPELS $d OPELS
049 $a TEFA
050 1 4 $a TK7874 $b .P39 2009
082 0 4 $a 621.3815 $2 22
100 1 $a Pavlidis, Vasilis F., $d 1976- $3 1068961
245 1 0 $a Three-dimensional integrated circuit design $h [electronic resource] / $c Vasilis F. Pavlidis, Eby G. Friedman.
260 $a Amsterdam ; $a Boston : $c c2009. $b Morgan Kaufmann,
300 $a xv, 309 p. : $b ill. ; $c 25 cm.
440 4 $a The Morgan Kaufmann series in systems on silicon
504 $a Includes bibliographical references (p. 289-303) and index.
505 0 $a Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.
520 $a With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance.
533 $a Electronic reproduction. $b Amsterdam : $c Elsevier Science & Technology, $d 2009. $n Mode of access: World Wide Web. $n System requirements: Web browser. $n Title from title screen (viewed on Apr. 10, 2009). $n Access may be restricted to users at subscribing institutions.
650 0 $a Integrated circuits $x Design and construction. $3 658490
655 7 $a Electronic books. $2 lcsh $3 542853
700 1 $a Friedman, Eby G. $3 898949
710 2 $a ScienceDirect (Online service) $3 848416
856 4 0 $3 Referex $u http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780123743435 $z An electronic book accessible through the World Wide Web; click for information
856 4 0 $3 ScienceDirect $u http://www.sciencedirect.com/science/book/9780123743435 $z An electronic book accessible through the World Wide Web; click for information
994 $a C0 $b TEF