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Customizable embedded processors = d...
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Leupers, Rainer.
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Customizable embedded processors = design technologies and applications /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Customizable embedded processors/ Paolo Ienne and Rainer Leupers.
其他題名:
design technologies and applications /
作者:
Ienne, Paolo.
其他作者:
Leupers, Rainer.
出版者:
San Francisco, Calif. :Morgan Kaufmann ; : 2006.,
面頁冊數:
xxviii, 497 p. :ill. ;25 cm.
內容註:
Introduction -- Business Opportunities: The Case of Wireless Applications -- Logistic Challenges: Lofty Ambitions and Stark Realities of Customizing Processors -- Architectural Description Languages -- Retargetable Toolsets -- Processor Configuration -- Automatic Instruction-Set Extensions -- Challenges to Automatic Customization -- Toolset Support for Instruction-Set Extensions -- Coprocessor Generation from Executable Code -- Datapath Synthesis -- Instruction Matching and Modelling -- Processor Verification -- Sub-RISC Processors -- An ASIP for UMTS-FDD Cell Search -- Hardware/software Trade-offs for Advanced 3G Channel Decoding -- FPGA-Based Processor Implementation -- Designing a H.264 Encoder with Real-World Tradeoffs.
標題:
Embedded computer systems - Design. -
電子資源:
http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780123695260An electronic book accessible through the World Wide Web; click for information
電子資源:
http://www.sciencedirect.com/science/book/9780123695260An electronic book accessible through the World Wide Web; click for information
ISBN:
0123695260
Customizable embedded processors = design technologies and applications /
Ienne, Paolo.
Customizable embedded processors
design technologies and applications /[electronic resource] :Paolo Ienne and Rainer Leupers. - San Francisco, Calif. :Morgan Kaufmann ;2006. - xxviii, 497 p. :ill. ;25 cm.
Introduction -- Business Opportunities: The Case of Wireless Applications -- Logistic Challenges: Lofty Ambitions and Stark Realities of Customizing Processors -- Architectural Description Languages -- Retargetable Toolsets -- Processor Configuration -- Automatic Instruction-Set Extensions -- Challenges to Automatic Customization -- Toolset Support for Instruction-Set Extensions -- Coprocessor Generation from Executable Code -- Datapath Synthesis -- Instruction Matching and Modelling -- Processor Verification -- Sub-RISC Processors -- An ASIP for UMTS-FDD Cell Search -- Hardware/software Trade-offs for Advanced 3G Channel Decoding -- FPGA-Based Processor Implementation -- Designing a H.264 Encoder with Real-World Tradeoffs.
Customizable processors have been described as the next natural step in the evolution of the microprocessor business: a step in the life of a new technology where top performance alone is no longer sufficient to guarantee market success. Other factors become fundamental, such as time to market, convenience, energy efficiency, and ease of customization. This book is the first to explore comprehensively one of the most fundamental trends which emerged in the last decade: to treat processors not as rigid, fixed entities, which designers include as is in their products; but rather, to build sound methodologies to tailor-fit processors to the specific needs of such products. This book addresses the goal of maintaining a very large family of processors, with a wide range of features, at a cost comparable to that of maintaining a single processor. First book to present comprehensively the major ASIP design methodologies and tools without any particular bias. Written by most of the pioneers and top international experts of this young domain. Unique mix of management perspective, technical detail, research outlook, and practical implementation.
Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2007.
Mode of access: World Wide Web.
ISBN: 0123695260
Source: 116395:116493Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:
1001793
Embedded computer systems
--Design.Index Terms--Genre/Form:
542853
Electronic books.
LC Class. No.: TK7895.E42 / I455 2007eb
Dewey Class. No.: 004.16
Customizable embedded processors = design technologies and applications /
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Introduction -- Business Opportunities: The Case of Wireless Applications -- Logistic Challenges: Lofty Ambitions and Stark Realities of Customizing Processors -- Architectural Description Languages -- Retargetable Toolsets -- Processor Configuration -- Automatic Instruction-Set Extensions -- Challenges to Automatic Customization -- Toolset Support for Instruction-Set Extensions -- Coprocessor Generation from Executable Code -- Datapath Synthesis -- Instruction Matching and Modelling -- Processor Verification -- Sub-RISC Processors -- An ASIP for UMTS-FDD Cell Search -- Hardware/software Trade-offs for Advanced 3G Channel Decoding -- FPGA-Based Processor Implementation -- Designing a H.264 Encoder with Real-World Tradeoffs.
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