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A wideband low-power continuous-time...
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Oregon State University.
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A wideband low-power continuous-time Delta-Sigma modulator for next generation wireless applications.
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
A wideband low-power continuous-time Delta-Sigma modulator for next generation wireless applications./
作者:
Chen, Xuefeng.
面頁冊數:
125 p.
附註:
Adviser: Gabor C. Temes.
Contained By:
Dissertation Abstracts International68-02B.
標題:
Engineering, Electronics and Electrical. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3253157
A wideband low-power continuous-time Delta-Sigma modulator for next generation wireless applications.
Chen, Xuefeng.
A wideband low-power continuous-time Delta-Sigma modulator for next generation wireless applications.
- 125 p.
Adviser: Gabor C. Temes.
Thesis (Ph.D.)--Oregon State University, 2007.
Delta-Sigma (DeltaSigma) analog-to-digital converters (ADCs) are widely used in wireless transceivers. Recently, continuous-time (CT) DeltaSigma ADCs gain growing interest in wireless applications for their lower power consumption and wider input bandwidth as compared with the discrete-time (DT) counterparts.Subjects--Topical Terms:
626636
Engineering, Electronics and Electrical.
A wideband low-power continuous-time Delta-Sigma modulator for next generation wireless applications.
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A wideband low-power continuous-time Delta-Sigma modulator for next generation wireless applications.
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125 p.
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Adviser: Gabor C. Temes.
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Source: Dissertation Abstracts International, Volume: 68-02, Section: B, page: 1169.
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Thesis (Ph.D.)--Oregon State University, 2007.
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Delta-Sigma (DeltaSigma) analog-to-digital converters (ADCs) are widely used in wireless transceivers. Recently, continuous-time (CT) DeltaSigma ADCs gain growing interest in wireless applications for their lower power consumption and wider input bandwidth as compared with the discrete-time (DT) counterparts.
520
$a
In this thesis, a wideband low-power CT DeltaSigma modulator for next generation wireless applications is proposed to achieve 10-bit dynamic range within a 25 MHz signal bandwidth. On the system level, a low-power, mainly feed-forward architecture is used to realize the loop filter. Feed-in branches are added and optimized to eliminate the out-of-band peaking in the signal transfer function. On the circuit level, two-stage operational amplifiers with class-AB output stages are used to implement low-power active RC integrators. Capacitor tuning is used to compensate the variation of RC time constants. In addition, a fast current adder, an 11-level internal flash ADC and three current feedback DACs are also integrated on the chip which was manufactured in TSMC 0.18 mum CMOS technology. The test results show that the modulator draws less than 10 mA from the 1.8 V supply voltage.
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http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3253157
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