東華大學圖書館 |

See MIPS run

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	See MIPS run/ Dominic Sweetman.
其他題名:	See MIPS run Linux
作者:	Sweetman, Dominic.
出版者:	San Francisco, Calif. :Morgan Kaufmann Publishers/Elsevier, : c2007.,
面頁冊數:	xix, 492 p. :ill. ;24 cm.
內容註:	Chapter 1: RISCs and MIPS -- Chapter 2: MIPS Architecture -- Chapter 3: Coprocessor 0: MIPS Processor Control -- Chapter 4: How Caches work on MIPS -- Chapter 5: Exceptions, Interrupts, and Initialization -- Chapter 6: Low-level Memory Management and the TLB -- Chapter 7: Floating-Point Support -- Chapter 8: Complete Guide to the MIPS Instruction Set -- Chapter 9: Reading MIPS Assembler Language -- Chapter 10: Porting Software to MIPS -- Chapter 11: MIPS Software Standards (ABIs) -- Chapter 12: Debugging MIPS - debug and profiling features -- Chapter 13: GNU/Linux from Eight Miles High -- Chapter 14: How hardware and software work together -- Chapter 15: MIPS-specific issues in the Linux kernel -- Chapter 16: Linux Application Code, PIC and Libraries -- Appendix A: MIPS Multithreading -- Appendix B: Other Optional extensions to the MIPS instruction set -- MIPS Glossary.
標題:	Embedded computer systems - Programming. -
電子資源:	http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780120884216An electronic book accessible through the World Wide Web; click for information
電子資源:	http://www.sciencedirect.com/science/book/9780120884216An electronic book accessible through the World Wide Web; click for information
電子資源:	http://www.loc.gov/catdir/enhancements/fy0704/2006287016-d.html
ISBN:	0120884216

See MIPS run
Sweetman, Dominic.

See MIPS run[electronic resource] /See MIPS run LinuxDominic Sweetman. - 2nd ed. - San Francisco, Calif. :Morgan Kaufmann Publishers/Elsevier,c2007. - xix, 492 p. :ill. ;24 cm.

Includes bibliographical references (p. 477-479) and index.

Chapter 1: RISCs and MIPS -- Chapter 2: MIPS Architecture -- Chapter 3: Coprocessor 0: MIPS Processor Control -- Chapter 4: How Caches work on MIPS -- Chapter 5: Exceptions, Interrupts, and Initialization -- Chapter 6: Low-level Memory Management and the TLB -- Chapter 7: Floating-Point Support -- Chapter 8: Complete Guide to the MIPS Instruction Set -- Chapter 9: Reading MIPS Assembler Language -- Chapter 10: Porting Software to MIPS -- Chapter 11: MIPS Software Standards (ABIs) -- Chapter 12: Debugging MIPS - debug and profiling features -- Chapter 13: GNU/Linux from Eight Miles High -- Chapter 14: How hardware and software work together -- Chapter 15: MIPS-specific issues in the Linux kernel -- Chapter 16: Linux Application Code, PIC and Libraries -- Appendix A: MIPS Multithreading -- Appendix B: Other Optional extensions to the MIPS instruction set -- MIPS Glossary.

This second edition is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based. * Completely new material offers the best explanation available on how Linux runs on real hardware. * Provides a complete, updated and easy-to-use guide to the MIPS instruction set using the MIPS32 standard as the baseline architecture with the MIPS64 as the main option. * Retains the same engaging writing style that made the first edition so readable, reflecting the authors 20+ years experience in designing systems based on the MIPS architecture.

Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2007.

Mode of access: World Wide Web.

ISBN: 0120884216

Source: 106619:106653Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:

667705
Embedded computer systems
--Programming.Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: QA76.9.A73 / S88 2007eb

Dewey Class. No.: 004.165

See MIPS run
LDR:04365nam 2200373 a 45 001 841525
003 OCoLC
005 20100601
006 m d
007 cr cn|||||||||
008 100601s2007 caua sb 001 0 eng d
020 $a 0120884216
020 $a 9780120884216
029 1 $a NZ1 $b 11778174
035 $a (OCoLC)162130089
035 $a ocn162130089
037 $a 106619:106653 $b Elsevier Science & Technology $n http://www.sciencedirect.com
040 $a OPELS $c OPELS $d BAKER
049 $a TEFA
050 1 4 $a QA76.9.A73 $b S88 2007eb
082 0 4 $a 004.165 $2 22
100 1 $a Sweetman, Dominic. $3 811668
245 1 0 $a See MIPS run $h [electronic resource] / $c Dominic Sweetman.
246 1 4 $a See MIPS run Linux
250 $a 2nd ed.
260 $a San Francisco, Calif. : $c c2007. $b Morgan Kaufmann Publishers/Elsevier,
300 $a xix, 492 p. : $b ill. ; $c 24 cm.
504 $a Includes bibliographical references (p. 477-479) and index.
505 0 $a Chapter 1: RISCs and MIPS -- Chapter 2: MIPS Architecture -- Chapter 3: Coprocessor 0: MIPS Processor Control -- Chapter 4: How Caches work on MIPS -- Chapter 5: Exceptions, Interrupts, and Initialization -- Chapter 6: Low-level Memory Management and the TLB -- Chapter 7: Floating-Point Support -- Chapter 8: Complete Guide to the MIPS Instruction Set -- Chapter 9: Reading MIPS Assembler Language -- Chapter 10: Porting Software to MIPS -- Chapter 11: MIPS Software Standards (ABIs) -- Chapter 12: Debugging MIPS - debug and profiling features -- Chapter 13: GNU/Linux from Eight Miles High -- Chapter 14: How hardware and software work together -- Chapter 15: MIPS-specific issues in the Linux kernel -- Chapter 16: Linux Application Code, PIC and Libraries -- Appendix A: MIPS Multithreading -- Appendix B: Other Optional extensions to the MIPS instruction set -- MIPS Glossary.
520 $a This second edition is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based. * Completely new material offers the best explanation available on how Linux runs on real hardware. * Provides a complete, updated and easy-to-use guide to the MIPS instruction set using the MIPS32 standard as the baseline architecture with the MIPS64 as the main option. * Retains the same engaging writing style that made the first edition so readable, reflecting the authors 20+ years experience in designing systems based on the MIPS architecture.
533 $a Electronic reproduction. $b Amsterdam : $c Elsevier Science & Technology, $d 2007. $n Mode of access: World Wide Web. $n System requirements: Web browser. $n Title from title screen (viewed on July 25, 2007). $n Access may be restricted to users at subscribing institutions.
650 0 $a Embedded computer systems $x Programming. $3 667705
650 0 $a MIPS (Computer architecture) $3 1000699
650 0 $a RISC microprocessors. $3 666514
655 7 $a Electronic books. $2 lcsh $3 542853
710 2 $a ScienceDirect (Online service) $3 848416
856 4 0 $3 Referex $u http://www.engineeringvillage.com/controller/servlet/OpenURL?genre=book&isbn=9780120884216 $z An electronic book accessible through the World Wide Web; click for information
856 4 0 $3 ScienceDirect $u http://www.sciencedirect.com/science/book/9780120884216 $z An electronic book accessible through the World Wide Web; click for information
856 4 2 $3 Publisher description $u http://www.loc.gov/catdir/enhancements/fy0704/2006287016-d.html
938 $a Baker & Taylor $b BKTY $c 67.95 $d 67.95 $i 0120884216 $n 0006814579 $s active
994 $a C0 $b TEF