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System-On-A-Chip verification = meth...

Paterson, Peter, (1955-)

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System-On-A-Chip verification = methodology and techniques /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	System-On-A-Chip verification/ Prakash Rashinkar, Peter Paterson, Leena Singh.
其他題名:	methodology and techniques /
作者:	Rashinkar, Prakash,
其他作者:	Paterson, Peter,
出版者:	New York :Kluwer Academic Publishers, : c2002.,
面頁冊數:	xiii, 372 p. :ill. ;25 cm.
標題:	Computer software - Development. -
電子資源:	http://www.netLibrary.com/urlapi.asp?action=summary&v=1&bookid=67588An electronic book accessible through the World Wide Web; click for information
ISBN:	0306469952 (electronic bk.)

System-On-A-Chip verification = methodology and techniques /
Rashinkar, Prakash,1960-

System-On-A-Chip verificationmethodology and techniques /[electronic resource] :Prakash Rashinkar, Peter Paterson, Leena Singh. - New York :Kluwer Academic Publishers,c2002. - xiii, 372 p. :ill. ;25 cm.

Includes bibliographical references and index.

Electronic reproduction.
Boulder, Colo. :
NetLibrary,
2002.

Available via World Wide Web.

ISBN: 0306469952 (electronic bk.)Subjects--Topical Terms:

542671
Computer software
--Development.Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: QA76.9.S88 / R37 2002eb

Dewey Class. No.: 621.39/5

System-On-A-Chip verification = methodology and techniques /
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