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Frequency Reference MEMS-Based Oscillators.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Frequency Reference MEMS-Based Oscillators./
作者:	Kira, Ahmed.
面頁冊數:	1 online resource (166 pages)
附註:	Source: Dissertations Abstracts International, Volume: 84-05, Section: B.
Contained By:	Dissertations Abstracts International84-05B.
標題:	Microelectromechanical systems. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=30157789click for full text (PQDT)
ISBN:	9798352989562

Frequency Reference MEMS-Based Oscillators.
Kira, Ahmed.

Frequency Reference MEMS-Based Oscillators. - 1 online resource (166 pages)

Source: Dissertations Abstracts International, Volume: 84-05, Section: B.

Thesis (Ph.D.)--McGill University (Canada), 2022.

Includes bibliographical references

Timing and frequency reference oscillators are pivotal blocks in almost all electronic systems. Emerging applications, including internet-of-things (IoT) and mobile devices, impose stringent requirements on power consumption (battery life), cost, and size. In recent years, reference oscillators based on microelectromechanical systems (MEMS) resonators have become a key alternative to those based on quartz crystal resonators for enabling miniaturized systems along with high-performance levels.This dissertation introduces a 6.89 MHz MEMS oscillator based on an ultra-lowpower, low-noise, tunable gain/duty-cycle transimpedance amplifier (TIA) and a bulk Lam´e-mode MEMS resonator that has a quality factor (Q) of 3.24x106 . Self-cascoding and current-starving techniques are used in the TIA design to minimize the power consumption and tune the duty cycle of the output signal. The TIA was designed and fabricated in a TSMC 65 nm CMOS process technology. Its open-loop performance has been measured separately. It achieves a tunable gain between 107.9 dBΩ and 118.1 dBΩ while dissipating only 143 nW from a 1 V supply. The duty cycle of the output waveform can be tuned from 23.25% to 79.03%. The TIA has been interfaced, wire bonded, in a series-resonant oscillator configuration with the MEMS resonator, and mounted in a small cavity standard package. The closed-loop performance of the whole oscillator has been experimentally measured. It exhibits a phase noise of -128.1 dBc/Hz and -133.7 dBc/Hz at 1 kHz and 1 MHz offsets, respectively.A 110.2 MHz ultra-low-power phase-locked loop (PLL) has been designed for MEMS frequency reference oscillator applications. It utilizes the 6.89 MHz MEMS-based oscillator as an input reference frequency. An ultra-low-power, high-resolution phasefrequency detector (PFD) has been designed to achieve low noise performance. Eliminating the reset feedback path used in conventional PFDs has led to dead-/blind- zone free phase characteristics, which is crucial for low noise applications and a wide operating frequency range. The PFD operates up to 2.5 GHz and achieves a linear resolution of 100 ps input time difference (∆tin), without any additional calibration circuits. The linearity of the proposed PFD is tested over a phase difference corresponding to ∆tin from 100 ps to 50 ns. At a 1 V supply voltage, it shows an error of <±1.6% with a resolution of 100 ps and a frequency normalized power consumption (Pn) of 0.106 pW/Hz. The PLL is designed and fabricated in a TSMC 65 nm CMOS process technology and interfaced with the MEMS-based oscillator. The system reports a phase noise of -106.21 dBc/Hz and -135.36 dBc/Hz at 1 kHz and 1 MHz offsets, respectively. It occupies an active CMOS area of 0.1095 mm2 and consumes 6.709 µW at a 1 V supply voltage.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2023

Mode of access: World Wide Web

ISBN: 9798352989562Subjects--Topical Terms:

567138
Microelectromechanical systems.
Index Terms--Genre/Form:

542853
Electronic books.

Frequency Reference MEMS-Based Oscillators.
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500 $a Source: Dissertations Abstracts International, Volume: 84-05, Section: B.
500 $a Advisor: El-Gamal, Mourad N.
502 $a Thesis (Ph.D.)--McGill University (Canada), 2022.
504 $a Includes bibliographical references
520 $a Timing and frequency reference oscillators are pivotal blocks in almost all electronic systems. Emerging applications, including internet-of-things (IoT) and mobile devices, impose stringent requirements on power consumption (battery life), cost, and size. In recent years, reference oscillators based on microelectromechanical systems (MEMS) resonators have become a key alternative to those based on quartz crystal resonators for enabling miniaturized systems along with high-performance levels.This dissertation introduces a 6.89 MHz MEMS oscillator based on an ultra-lowpower, low-noise, tunable gain/duty-cycle transimpedance amplifier (TIA) and a bulk Lam´e-mode MEMS resonator that has a quality factor (Q) of 3.24x106 . Self-cascoding and current-starving techniques are used in the TIA design to minimize the power consumption and tune the duty cycle of the output signal. The TIA was designed and fabricated in a TSMC 65 nm CMOS process technology. Its open-loop performance has been measured separately. It achieves a tunable gain between 107.9 dBΩ and 118.1 dBΩ while dissipating only 143 nW from a 1 V supply. The duty cycle of the output waveform can be tuned from 23.25% to 79.03%. The TIA has been interfaced, wire bonded, in a series-resonant oscillator configuration with the MEMS resonator, and mounted in a small cavity standard package. The closed-loop performance of the whole oscillator has been experimentally measured. It exhibits a phase noise of -128.1 dBc/Hz and -133.7 dBc/Hz at 1 kHz and 1 MHz offsets, respectively.A 110.2 MHz ultra-low-power phase-locked loop (PLL) has been designed for MEMS frequency reference oscillator applications. It utilizes the 6.89 MHz MEMS-based oscillator as an input reference frequency. An ultra-low-power, high-resolution phasefrequency detector (PFD) has been designed to achieve low noise performance. Eliminating the reset feedback path used in conventional PFDs has led to dead-/blind- zone free phase characteristics, which is crucial for low noise applications and a wide operating frequency range. The PFD operates up to 2.5 GHz and achieves a linear resolution of 100 ps input time difference (∆tin), without any additional calibration circuits. The linearity of the proposed PFD is tested over a phase difference corresponding to ∆tin from 100 ps to 50 ns. At a 1 V supply voltage, it shows an error of <±1.6% with a resolution of 100 ps and a frequency normalized power consumption (Pn) of 0.106 pW/Hz. The PLL is designed and fabricated in a TSMC 65 nm CMOS process technology and interfaced with the MEMS-based oscillator. The system reports a phase noise of -106.21 dBc/Hz and -135.36 dBc/Hz at 1 kHz and 1 MHz offsets, respectively. It occupies an active CMOS area of 0.1095 mm2 and consumes 6.709 µW at a 1 V supply voltage.
520 $a Les oscillateurs servant de temporelle ou frequentielle sont des blocs essentiels dans presque tous les systemes electroniques. Les applications emergentes, en particulier l'internet des objets (IoT) et les appareils mobiles, imposent des exigences strictes en matiere de consommation d'Energie (autonomie de la batterie), de cout et de taille. Ces dernieres annees, les oscillateurs de reference bas es sur des resonateurs de systemes micro electromecaniques (MEMS) sont devenus une alternative viable a ceux bases sur des resonateurs a cristaux de quartz, afin de permettre des systemes miniaturises avec un haut niveau de performance.Cette these presente un oscillateur MEMS de 6,89 MHz bas es sur un amplificateur trans impedance (TIA) a tres faible puissance, a faible bruit, a gain/cycle de service reglable et un resonateur MEMS de 6,89 MHz en mode Lam e massif, dont le facteur de qualite (Q) est de 3,24x106. Des techniques d'auto-cas codage et de limitation du courant sont utilisees pour minimiser la consommation d'energie et regler le rapport cyclique de signal de sortie. Le TIA a ete concu et fabrique dans une technologie de processus CMOS TSMC 65 nm. Ses performances en boucle ouverte a ete mesuree separement. Ainsi le gain du TIA est reglable entre 107,9 dBΩ et 118,1 dBΩ tout en dissipant seulement 143 n W a partir d'une alimentation de 1 V. Le rapport cyclique de la forme d'onde de sortie peut etre modifie entre 23,25 % a 79,03 %. Le TIA a ete interface, cable, dans une configuration d'oscillateur resonnant en serie avec le resonateur MEMS et mont e dans un petit boitier standard a cavite. Les performances en boucle fermee du l'oscillateur entier a ete mesure experimentalement. Il presente un bruit de phase de -128,1 dBc/Hz et -133,7 dBc/Hz a des decalages de 1 kHz et 1 MHz, respectivement.Une boucle a verrouillage de phase (PLL) de 110,2 MHz a tres faible puissance a ete concue pour les applications d'oscillateur de reference de frequence MEMS. Elle utilise l'oscillateur MEMS de 6,89 MHz comme reference d'entree. Un detecteur phase-frequence (PFD) haute resolution et a tres faible consommation a ete concu pour obtenir des performances a faible bruit. L'elimination du chemin de retour de reinitialisation utilise dans les PFD conventionnels a permis d'obtenir des caracteristiques de phase sans zone morte ou aveugle, ce qui est crucial pour les applications a faible bruit et une large gamme de frequences de fonctionnement. Le PFD fonctionne jusqu'a 2,5 GHz et atteint une resolution lineaire de 100 ps de difference de temps d'entree (Δtin), sans avoir besoin de circuits de calibration supplementaires. La linearite du PFD propos e est testee sur une difference de phase correspondant a un Δtin de 100 ps a 50 ns. A une tension d'alimentation de 1 V, il montre une erreur de <±1,6% avec une resolution de 100 ps, et une consommation d'energie normalisee en frequence (Pn) de 0.106 pW/Hz. La PLL est concue et fabriquee dans une technologie de processus CMOS TSMC 65 nm et interfacee avec l'oscillateur base sur les MEMS. Le systeme presente un bruit de phase de -106,21 dBc/Hz et -135,36 dBc/Hz a des decalages de 1 kHz et 1 MHz, respectivement. Il consomme 6,709 μW a une alimentation de 1 V et occupe 0,1095 mm2 de surface CMOS active.
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