東華大學圖書館 |

Embedded computing for high performance = efficient mapping of computations using customization, code transformations and compilation /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Embedded computing for high performance/ João M.P. Cardoso, José Gabriel F. Coutinho, Pedro C. Diniz.
其他題名:	efficient mapping of computations using customization, code transformations and compilation /
作者:	Cardoso, João M. P.,
其他作者:	Coutinho, José Gabriel de Figueiredo,
出版者:	Cambridge, MA :Morgan Kaufmann Publishers, an imprint of Elsevier, : 2017.,
面頁冊數:	1 online resource (xxi, 297 p.) :ill. (some col.)
內容註:	Front Cover; Embedded Computing for High Performance: Efficient Mapping of Computations Using Customization, CodeTransformations and Com ... ; Copyright; Dedication; Contents; About the Authors; Preface; Acknowledgments; Abbreviations; Chapter 1: Introduction; 1.1. Overview; 1.2. Embedded Systems in Society and Industry; 1.3. Embedded Computing Trends; 1.4. Embedded Systems: Prototyping and Production; 1.5. About LARA: An Aspect- Oriented Approach; 1.6. Objectives and Target Audience; 1.7. Complementary Bibliography; 1.8. Dependences in Terms of Knowledge; 1.9. Examples and Benchmarks.
內容註:	1.10. Book Organization1.11. Intended Use; 1.12. Summary; References; Chapter 2: High-performance embedded computing; 2.1. Introduction; 2.2. Target Architectures; 2.2.1. Hardware Accelerators as Coprocessors; 2.2.2. Multiprocessor and Multicore Architectures; 2.2.3. Heterogeneous Multiprocessor/Multicore Architectures; 2.2.4. OpenCL Platform Model; 2.3. Core-Based Architectural Enhancements; 2.3.1. Single Instruction, Multiple Data Units; 2.3.2. Fused Multiply-Add Units; 2.3.3. Multithreading Support; 2.4. Common Hardware Accelerators; 2.4.1. GPU Accelerators.
內容註:	2.4.2. Reconfigurable Hardware Accelerators2.4.3. SoCs With Reconfigurable Hardware; 2.5. Performance; 2.5.1. Amdahl's Law; 2.5.2. The Roofline Model; 2.5.3. Worst-Case Execution Time Analysis; 2.6. Power and Energy Consumption; 2.6.1. Dynamic Power Management; 2.6.2. Dynamic Voltage and Frequency Scaling; 2.6.3. Dark Silicon; 2.7. Comparing Results; 2.8. Summary; 2.9. Further Reading; References; Chapter 3: Controlling the design and development cycle; 3.1. Introduction; 3.2. Specifications in MATLAB and C: Prototyping and Development; 3.2.1. Abstraction Levels.
內容註:	3.2.2. Dealing With Different Concerns3.2.3. Dealing With Generic Code; 3.2.4. Dealing With Multiple Targets; 3.3. Translation, Compilation, and Synthesis Design flows; 3.4. Hardware/Software Partitioning; 3.4.1. Static Partitioning; 3.4.2. Dynamic Partitioning; 3.5. LARA: a language for Specifying Strategies; 3.5.1. Select and Apply; 3.5.2. Insert Action; 3.5.3. Exec and Def Actions; 3.5.4. Invoking Aspects; 3.5.5. Executing External Tools; 3.5.6. Compilation and Synthesis Strategies in LARA; 3.6. Summary; 3.7. Further Reading; References; Chapter 4: Source code analysis and instrumentation.
內容註:	4.1. Introduction4.2. Analysis and Metrics; 4.3. Static Source Code Analysis; 4.3.1. Data Dependences; 4.3.2. Code Metrics; 4.4. Dynamic Analysis: The Need for Instrumentation; 4.4.1. Information From Profiling; 4.4.2. Profiling Example; 4.5. Custom Profiling Examples; 4.5.1. Finding Hotspots; 4.5.2. Loop Metrics; 4.5.3. Dynamic Call Graphs; 4.5.4. Branch Frequencies; 4.5.5. Heap Memory; 4.6. Summary; 4.7. Further Reading; References; Chapter 5: Source code transformations and optimizations; 5.1. Introduction; 5.2. Basic Transformations; 5.3. Data Type Conversions; 5.4. Code Reordering.
標題:	Embedded computer systems. -
電子資源:	https://www.sciencedirect.com/science/book/9780128041895
ISBN:	9780128041994 (electronic bk.)

Embedded computing for high performance = efficient mapping of computations using customization, code transformations and compilation /
Cardoso, João M. P.,

Embedded computing for high performanceefficient mapping of computations using customization, code transformations and compilation /[electronic resource] :João M.P. Cardoso, José Gabriel F. Coutinho, Pedro C. Diniz. - Cambridge, MA :Morgan Kaufmann Publishers, an imprint of Elsevier,2017. - 1 online resource (xxi, 297 p.) :ill. (some col.)

Includes bibliographical references and index.

Front Cover; Embedded Computing for High Performance: Efficient Mapping of Computations Using Customization, CodeTransformations and Com ... ; Copyright; Dedication; Contents; About the Authors; Preface; Acknowledgments; Abbreviations; Chapter 1: Introduction; 1.1. Overview; 1.2. Embedded Systems in Society and Industry; 1.3. Embedded Computing Trends; 1.4. Embedded Systems: Prototyping and Production; 1.5. About LARA: An Aspect- Oriented Approach; 1.6. Objectives and Target Audience; 1.7. Complementary Bibliography; 1.8. Dependences in Terms of Knowledge; 1.9. Examples and Benchmarks.

Embedded Computing for High Performance: Design Exploration and Customization Using High-level Compilation and Synthesis Tools provides a set of real-life example implementations that migrate traditional desktop systems to embedded systems. Working with popular hardware, including Xilinx and ARM, the book offers a comprehensive description of techniques for mapping computations expressed in programming languages such as C or MATLAB to high-performance embedded architectures consisting of multiple CPUs, GPUs, and reconfigurable hardware (FPGAs). The authors demonstrate a domain-specific language (LARA) that facilitates retargeting to multiple computing systems using the same source code. In this way, users can decouple original application code from transformed code and enhance productivity and program portability. After reading this book, engineers will understand the processes, methodologies, and best practices needed for the development of applications for high-performance embedded computing systems.

ISBN: 9780128041994 (electronic bk.)

Nat. Bib. No.: GBB797879bnbSubjects--Topical Terms:

582088
Embedded computer systems.
Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: TK7895.E42

Dewey Class. No.: 004.16

Embedded computing for high performance = efficient mapping of computations using customization, code transformations and compilation /
LDR:05277cmm a2200337 a 4500 001 2308382
006 m o d
007 cr |n|||||||||
008 230530s2017 maua ob 001 0 eng d
015 $a GBB797879 $2 bnb
019 $a 991673701 $a 993443648 $a 994692064 $a 1105179513 $a 1105574532
020 $a 9780128041994 (electronic bk.)
020 $a 0128041994 (electronic bk.)
020 $a 9780128041895
020 $a 0128041897
035 $a (OCoLC)990802569 $z (OCoLC)991673701 $z (OCoLC)993443648
035 $a 990802569
040 $a N$T $b eng $c N$T $d NLE $d OCLCO $d N$T $d OPELS $d IDEBK $d EBLCP $d MERUC $d OCLCF $d UMI $d YDX $d MERER $d STF $d OCLCQ $d TOH $d UPM $d OCLCQ $d NAM $d VT2 $d U3W $d UOK $d CEF $d OCLCQ $d WYU $d OCLCQ $d LQU $d UKMGB $d OCLCQ $d S2H
041 0 $a eng
050 4 $a TK7895.E42
082 0 4 $a 004.16 $2 23
100 1 $a Cardoso, João M. P., $e author. $3 3614801
245 1 0 $a Embedded computing for high performance $h [electronic resource] : $b efficient mapping of computations using customization, code transformations and compilation / $c João M.P. Cardoso, José Gabriel F. Coutinho, Pedro C. Diniz.
260 $a Cambridge, MA : $b Morgan Kaufmann Publishers, an imprint of Elsevier, $c 2017.
300 $a 1 online resource (xxi, 297 p.) : $b ill. (some col.)
504 $a Includes bibliographical references and index.
505 0 $a Front Cover; Embedded Computing for High Performance: Efficient Mapping of Computations Using Customization, CodeTransformations and Com ... ; Copyright; Dedication; Contents; About the Authors; Preface; Acknowledgments; Abbreviations; Chapter 1: Introduction; 1.1. Overview; 1.2. Embedded Systems in Society and Industry; 1.3. Embedded Computing Trends; 1.4. Embedded Systems: Prototyping and Production; 1.5. About LARA: An Aspect- Oriented Approach; 1.6. Objectives and Target Audience; 1.7. Complementary Bibliography; 1.8. Dependences in Terms of Knowledge; 1.9. Examples and Benchmarks.
505 8 $a 1.10. Book Organization1.11. Intended Use; 1.12. Summary; References; Chapter 2: High-performance embedded computing; 2.1. Introduction; 2.2. Target Architectures; 2.2.1. Hardware Accelerators as Coprocessors; 2.2.2. Multiprocessor and Multicore Architectures; 2.2.3. Heterogeneous Multiprocessor/Multicore Architectures; 2.2.4. OpenCL Platform Model; 2.3. Core-Based Architectural Enhancements; 2.3.1. Single Instruction, Multiple Data Units; 2.3.2. Fused Multiply-Add Units; 2.3.3. Multithreading Support; 2.4. Common Hardware Accelerators; 2.4.1. GPU Accelerators.
505 8 $a 2.4.2. Reconfigurable Hardware Accelerators2.4.3. SoCs With Reconfigurable Hardware; 2.5. Performance; 2.5.1. Amdahl's Law; 2.5.2. The Roofline Model; 2.5.3. Worst-Case Execution Time Analysis; 2.6. Power and Energy Consumption; 2.6.1. Dynamic Power Management; 2.6.2. Dynamic Voltage and Frequency Scaling; 2.6.3. Dark Silicon; 2.7. Comparing Results; 2.8. Summary; 2.9. Further Reading; References; Chapter 3: Controlling the design and development cycle; 3.1. Introduction; 3.2. Specifications in MATLAB and C: Prototyping and Development; 3.2.1. Abstraction Levels.
505 8 $a 3.2.2. Dealing With Different Concerns3.2.3. Dealing With Generic Code; 3.2.4. Dealing With Multiple Targets; 3.3. Translation, Compilation, and Synthesis Design flows; 3.4. Hardware/Software Partitioning; 3.4.1. Static Partitioning; 3.4.2. Dynamic Partitioning; 3.5. LARA: a language for Specifying Strategies; 3.5.1. Select and Apply; 3.5.2. Insert Action; 3.5.3. Exec and Def Actions; 3.5.4. Invoking Aspects; 3.5.5. Executing External Tools; 3.5.6. Compilation and Synthesis Strategies in LARA; 3.6. Summary; 3.7. Further Reading; References; Chapter 4: Source code analysis and instrumentation.
505 8 $a 4.1. Introduction4.2. Analysis and Metrics; 4.3. Static Source Code Analysis; 4.3.1. Data Dependences; 4.3.2. Code Metrics; 4.4. Dynamic Analysis: The Need for Instrumentation; 4.4.1. Information From Profiling; 4.4.2. Profiling Example; 4.5. Custom Profiling Examples; 4.5.1. Finding Hotspots; 4.5.2. Loop Metrics; 4.5.3. Dynamic Call Graphs; 4.5.4. Branch Frequencies; 4.5.5. Heap Memory; 4.6. Summary; 4.7. Further Reading; References; Chapter 5: Source code transformations and optimizations; 5.1. Introduction; 5.2. Basic Transformations; 5.3. Data Type Conversions; 5.4. Code Reordering.
520 $a Embedded Computing for High Performance: Design Exploration and Customization Using High-level Compilation and Synthesis Tools provides a set of real-life example implementations that migrate traditional desktop systems to embedded systems. Working with popular hardware, including Xilinx and ARM, the book offers a comprehensive description of techniques for mapping computations expressed in programming languages such as C or MATLAB to high-performance embedded architectures consisting of multiple CPUs, GPUs, and reconfigurable hardware (FPGAs). The authors demonstrate a domain-specific language (LARA) that facilitates retargeting to multiple computing systems using the same source code. In this way, users can decouple original application code from transformed code and enhance productivity and program portability. After reading this book, engineers will understand the processes, methodologies, and best practices needed for the development of applications for high-performance embedded computing systems.
650 0 $a Embedded computer systems. $3 582088
650 0 $a High performance computing. $3 591827
655 4 $a Electronic books. $2 lcsh $3 542853
700 1 $a Coutinho, José Gabriel de Figueiredo, $e author. $3 3614802
700 1 $a Diniz, Pedro C., $e author. $3 3614803
856 4 0 $u https://www.sciencedirect.com/science/book/9780128041895