東華大學圖書館 |

語系: 繁體中文

說明(常見問題)

回圖書館首頁

手機版館藏查詢

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

Design, Prototyping, and System-Leve...

Walwaikar, Anisha Upendra.

FindBook

Google Book

Amazon

博客來

Design, Prototyping, and System-Level Analysis of a Novel Light Emitting Diode (LED) Packaging Technology.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Design, Prototyping, and System-Level Analysis of a Novel Light Emitting Diode (LED) Packaging Technology./
作者:	Walwaikar, Anisha Upendra.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2019,
面頁冊數:	186 p.
附註:	Source: Dissertations Abstracts International, Volume: 81-08, Section: A.
Contained By:	Dissertations Abstracts International81-08A.
標題:	Industrial engineering. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=27671615
ISBN:	9781392437971

Design, Prototyping, and System-Level Analysis of a Novel Light Emitting Diode (LED) Packaging Technology.
Walwaikar, Anisha Upendra.

Design, Prototyping, and System-Level Analysis of a Novel Light Emitting Diode (LED) Packaging Technology. - Ann Arbor : ProQuest Dissertations & Theses, 2019 - 186 p.

Source: Dissertations Abstracts International, Volume: 81-08, Section: A.

Thesis (Ph.D.)--State University of New York at Binghamton, 2019.

This item must not be sold to any third party vendors.

This research provides a comprehensive study on the feasibility of the use of Power Overlay (POL) technology for high-power Light Emitting Diode (LED) packages from both a thermal- and reliability perspective. This technology incorporates thermal vias in a low thermal conductivity polyimide substrate directly below the LED chip to reduce the thermal resistance and, thereby, improve the thermal architecture of the LED prototype. The research evaluates the thermal-performance at the package- and system-level prior to fabrication, provides a proof of concept, experimentally measures thermal performance, validates thermal model, performs reliability tests to study its failure mechanisms, and highlights the importance of efficient thermal architecture and the need to choose the right packaging material. The package- and system-level analysis show that the copper vias that extend from the LED die to the package contact pads provide the primary heat dissipation path for the LED package. This is due to the low thermal conductivity of the polyimide and epoxy-based adhesive. The second-level assembly (FR-4 board) adds additional thermal nodes in the heat dissipation path and, therefore, increases the overall temperature and the thermal resistance of the structure. The experimental results obtained using IR Microscopy shows that the inherent chip properties and localized heating not captured in the thermal model leads to asymmetric thermal profiles on the fabricated LED prototype. Therefore, the average chip surface temperature is used to compare and validate the experimental results with the thermal model. Wall-plug efficiency (WPE) is estimated by comparing the average surface temperatures obtained using the thermal model and IR Microscopy. The results indicate that the estimated WPE varies as a function of the input power. The increase in the input power results in a decrease in the WPE and vice versa. A reliability test performed to study the failure analysis shows that the combination of high temperature and high photon flux causes degradation of epoxy-based adhesive in the current design. Therefore, further improvements in the design are required to enhance the functionality and reliability of the LED prototype, especially with respect to choosing the epoxy-based adhesive material that can withstand high temperature and high photon flux.

ISBN: 9781392437971Subjects--Topical Terms:

526216
Industrial engineering.
Subjects--Index Terms:

Flexible polyimide

Design, Prototyping, and System-Level Analysis of a Novel Light Emitting Diode (LED) Packaging Technology.
LDR:03690nmm a2200385 4500 001 2272094
005 20201102111704.5
008 220629s2019 ||||||||||||||||| ||eng d
020 $a 9781392437971
035 $a (MiAaPQ)AAI27671615
035 $a AAI27671615
040 $a MiAaPQ $c MiAaPQ
100 1 $a Walwaikar, Anisha Upendra. $3 3549520
245 1 0 $a Design, Prototyping, and System-Level Analysis of a Novel Light Emitting Diode (LED) Packaging Technology.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2019
300 $a 186 p.
500 $a Source: Dissertations Abstracts International, Volume: 81-08, Section: A.
500 $a Advisor: Santos, Daryl;Srihari, Krishnaswami.
502 $a Thesis (Ph.D.)--State University of New York at Binghamton, 2019.
506 $a This item must not be sold to any third party vendors.
506 $a This item must not be added to any third party search indexes.
520 $a This research provides a comprehensive study on the feasibility of the use of Power Overlay (POL) technology for high-power Light Emitting Diode (LED) packages from both a thermal- and reliability perspective. This technology incorporates thermal vias in a low thermal conductivity polyimide substrate directly below the LED chip to reduce the thermal resistance and, thereby, improve the thermal architecture of the LED prototype. The research evaluates the thermal-performance at the package- and system-level prior to fabrication, provides a proof of concept, experimentally measures thermal performance, validates thermal model, performs reliability tests to study its failure mechanisms, and highlights the importance of efficient thermal architecture and the need to choose the right packaging material. The package- and system-level analysis show that the copper vias that extend from the LED die to the package contact pads provide the primary heat dissipation path for the LED package. This is due to the low thermal conductivity of the polyimide and epoxy-based adhesive. The second-level assembly (FR-4 board) adds additional thermal nodes in the heat dissipation path and, therefore, increases the overall temperature and the thermal resistance of the structure. The experimental results obtained using IR Microscopy shows that the inherent chip properties and localized heating not captured in the thermal model leads to asymmetric thermal profiles on the fabricated LED prototype. Therefore, the average chip surface temperature is used to compare and validate the experimental results with the thermal model. Wall-plug efficiency (WPE) is estimated by comparing the average surface temperatures obtained using the thermal model and IR Microscopy. The results indicate that the estimated WPE varies as a function of the input power. The increase in the input power results in a decrease in the WPE and vice versa. A reliability test performed to study the failure analysis shows that the combination of high temperature and high photon flux causes degradation of epoxy-based adhesive in the current design. Therefore, further improvements in the design are required to enhance the functionality and reliability of the LED prototype, especially with respect to choosing the epoxy-based adhesive material that can withstand high temperature and high photon flux.
590 $a School code: 0792.
650 4 $a Industrial engineering. $3 526216
650 4 $a Design. $3 518875
650 4 $a Packaging. $3 585030
653 $a Flexible polyimide
653 $a Light emitting diode (LED)
653 $a Packaging
653 $a Reliabililty
653 $a Thermal management
690 $a 0389
690 $a 0546
690 $a 0549
710 2 $a State University of New York at Binghamton. $b Systems Science Industrial Engineering. $3 2104041
773 0 $t Dissertations Abstracts International $g 81-08A.
790 $a 0792
791 $a Ph.D.
792 $a 2019
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=27671615