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Design techniques for wideband low-p...

Wang, Yan.

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Design techniques for wideband low-power delta-sigma analog -to -digital converters.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Design techniques for wideband low-power delta-sigma analog -to -digital converters./
作者:	Wang, Yan.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2010,
面頁冊數:	190 p.
附註:	Source: Dissertation Abstracts International, Volume: 71-03, Section: B, page: 1945.
Contained By:	Dissertation Abstracts International71-03B.
標題:	Electrical engineering. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3401200
ISBN:	9781109683301

Design techniques for wideband low-power delta-sigma analog -to -digital converters.
Wang, Yan.

Design techniques for wideband low-power delta-sigma analog -to -digital converters. - Ann Arbor : ProQuest Dissertations & Theses, 2010 - 190 p.

Source: Dissertation Abstracts International, Volume: 71-03, Section: B, page: 1945.

Thesis (Ph.D.)--Oregon State University, 2010.

This item is not available from ProQuest Dissertations & Theses.

Delta-Sigma (DeltaSigma) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems, high-definition television and radar systems. There are two general realizations of a DeltaSigma modulator. One is based on the discrete-time (DT) switched-capacitor (SC) circuitry and the other employs continuous-time (CT) circuitry. Compared to a CT structure, the DT DeltaSigma ADC is easier to analyze and design, is more robust to process variations and jitter noise, and is more flexible in the multi-mode applications. On the other hand, the CT DeltaSigma ADC does not suffer from the strict settling accuracy requirement for the loop filter and thus can achieve lower power dissipation and higher sampling frequency than its DT counterpart.

ISBN: 9781109683301Subjects--Topical Terms:

649834
Electrical engineering.

Design techniques for wideband low-power delta-sigma analog -to -digital converters.
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245 1 0 $a Design techniques for wideband low-power delta-sigma analog -to -digital converters.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2010
300 $a 190 p.
500 $a Source: Dissertation Abstracts International, Volume: 71-03, Section: B, page: 1945.
500 $a Advisers: Gabor C. Temes; Pavan Kumar Hanumolu.
502 $a Thesis (Ph.D.)--Oregon State University, 2010.
506 $a This item is not available from ProQuest Dissertations & Theses.
520 $a Delta-Sigma (DeltaSigma) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems, high-definition television and radar systems. There are two general realizations of a DeltaSigma modulator. One is based on the discrete-time (DT) switched-capacitor (SC) circuitry and the other employs continuous-time (CT) circuitry. Compared to a CT structure, the DT DeltaSigma ADC is easier to analyze and design, is more robust to process variations and jitter noise, and is more flexible in the multi-mode applications. On the other hand, the CT DeltaSigma ADC does not suffer from the strict settling accuracy requirement for the loop filter and thus can achieve lower power dissipation and higher sampling frequency than its DT counterpart.
520 $a In this thesis, both DT and CT DeltaSigma ADCs are investigated. Several design innovations, in both system-level and circuit-level, are proposed to achieve lower power consumption and wider signal bandwidth.
520 $a For DT DeltaSigma ADCs, a new dynamic-biasing scheme is proposed to reduce opamp bias current and the associated signal-dependent harmonic distortion is minimized by using the low-distortion architecture. The technique was verified in a 2.5MHz BW and 13bit dynamic range DT DeltaSigma ADC. In addition, a second-order noise-coupling technique is presented to save two integrators for the loop filter, and to achieve low power dissipation. Also, a direct-charge-transfer (DCT) technique is suggested to reduce the speed requirements of the adder, which is also preferable in wideband low-power applications.
520 $a For CT DeltaSigma ADCs, a wideband low power CT 2-2 MASH has been designed. High linearity performance was achieved by using a modified low-distortion technique, and the modulator achieves higher noise-shaping ability than the single stage structure due to the inter-stage gain. Also, the quantization noise leakage due to analog circuit non-idealities can be adaptively compensated by a designed digital calibration filter. Using a 90nm process, simulation of the modulator predicts a 12bit resolution within 20MHz BW and consumes only 25mW for analog circuitry. In addition, the noise-coupling technique is investigated and proposed for the design of CT DeltaSigma ADCs and it is promising to achieve low power dissipation for wideband applications.
520 $a Finally, the application of noise-coupling technique is extended and introduced to high-accuracy incremental data converters. Low power dissipation can be expected.
590 $a School code: 0172.
650 4 $a Electrical engineering. $3 649834
690 $a 0544
710 2 $a Oregon State University. $3 625720
773 0 $t Dissertation Abstracts International $g 71-03B.
790 $a 0172
791 $a Ph.D.
792 $a 2010
793 $a English
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