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Linear *RF CMOS circuit design.

Ding, Yongwang.

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Linear *RF CMOS circuit design.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Linear *RF CMOS circuit design./
Author:	Ding, Yongwang.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2004,
Description:	126 p.
Notes:	Source: Dissertation Abstracts International, Volume: 65-08, Section: B, page: 4186.
Contained By:	Dissertation Abstracts International65-08B.
Subject:	Electrical engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3142598
ISBN:	9780496004935

Linear *RF CMOS circuit design.
Ding, Yongwang.

Linear *RF CMOS circuit design. - Ann Arbor : ProQuest Dissertations & Theses, 2004 - 126 p.

Source: Dissertation Abstracts International, Volume: 65-08, Section: B, page: 4186.

Thesis (Ph.D.)--University of Minnesota, 2004.

This thesis presents techniques to improve the performance of linear integrated circuits (IC) in MOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. Integrated devices used in RF CMOS ICs are discussed, and their characteristics related to CMOS process and the applications are briefly reviewed. Several popular transconductor designs in CMOS are also reviewed. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. Although this thesis discusses CMOS integrated circuits at radio frequencies only, this linearization technique is generally applicable and not limited to CMOS or RF circuits. Several applications are presented. A prototype LNA has been fabricated in a 0.25mum CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulations and measurements that the new PA doubles the maximum output power and reduces the DC power consumption by up to 50%.

ISBN: 9780496004935Subjects--Topical Terms:

649834
Electrical engineering.

Linear *RF CMOS circuit design.
LDR:02409nmm a2200277 4500 001 2157484
005 20180605073452.5
008 190424s2004 ||||||||||||||||| ||eng d
020 $a 9780496004935
035 $a (MiAaPQ)AAI3142598
035 $a AAI3142598
040 $a MiAaPQ $c MiAaPQ
100 1 $a Ding, Yongwang. $3 896529
245 1 0 $a Linear *RF CMOS circuit design.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2004
300 $a 126 p.
500 $a Source: Dissertation Abstracts International, Volume: 65-08, Section: B, page: 4186.
500 $a Adviser: Ramesh Harjani.
502 $a Thesis (Ph.D.)--University of Minnesota, 2004.
520 $a This thesis presents techniques to improve the performance of linear integrated circuits (IC) in MOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. Integrated devices used in RF CMOS ICs are discussed, and their characteristics related to CMOS process and the applications are briefly reviewed. Several popular transconductor designs in CMOS are also reviewed. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. Although this thesis discusses CMOS integrated circuits at radio frequencies only, this linearization technique is generally applicable and not limited to CMOS or RF circuits. Several applications are presented. A prototype LNA has been fabricated in a 0.25mum CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulations and measurements that the new PA doubles the maximum output power and reduces the DC power consumption by up to 50%.
590 $a School code: 0130.
650 4 $a Electrical engineering. $3 649834
690 $a 0544
710 2 $a University of Minnesota. $3 676231
773 0 $t Dissertation Abstracts International $g 65-08B.
790 $a 0130
791 $a Ph.D.
792 $a 2004
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3142598