東華大學圖書館 |

語系: 繁體中文

說明(常見問題)

回圖書館首頁

手機版館藏查詢

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

Languages, design methods, and tools...

FDL (Conference) ((2016 :)

FindBook

Google Book

Amazon

博客來

Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Languages, design methods, and tools for electronic system design/ edited by Franco Fummi, Robert Wille.
其他題名:	selected contributions from FDL 2016 /
其他題名:	FDL 2016
其他作者:	Fummi, Franco.
團體作者:	FDL (Conference)
出版者:	Cham :Springer International Publishing : : 2018.,
面頁冊數:	vii, 116 p. :ill., digital ;24 cm.
內容註:	Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
Contained By:	Springer eBooks
標題:	Formal methods (Computer science) - Congresses. -
電子資源:	http://dx.doi.org/10.1007/978-3-319-62920-9
ISBN:	9783319629209

Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /
Languages, design methods, and tools for electronic system designselected contributions from FDL 2016 /[electronic resource] :FDL 2016edited by Franco Fummi, Robert Wille. - Cham :Springer International Publishing :2018. - vii, 116 p. :ill., digital ;24 cm. - Lecture notes in electrical engineering,v.4541876-1100 ;. - Lecture notes in electrical engineering ;v.454..

Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.

ISBN: 9783319629209

Standard No.: 10.1007/978-3-319-62920-9doiSubjects--Topical Terms:

622707
Formal methods (Computer science)
--Congresses.

LC Class. No.: QA76.9.F67

Dewey Class. No.: 621.3815

Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /
LDR:01739nmm a2200325 a 4500 001 2132218
003 DE-He213
005 20180719154220.0
006 m d
007 cr nn 008maaau
008 181005s2018 gw s 0 eng d
020 $a 9783319629209 $q (electronic bk.)
020 $a 9783319629193 $q (paper)
024 7 $a 10.1007/978-3-319-62920-9 $2 doi
035 $a 978-3-319-62920-9
040 $a GP $c GP
041 0 $a eng
050 4 $a QA76.9.F67
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
082 0 4 $a 621.3815 $2 23
090 $a QA76.9.F67 $b F287 2016
111 2 $a FDL (Conference) $d (2016 : $c Bremen, Germany) $3 3298540
245 1 0 $a Languages, design methods, and tools for electronic system design $h [electronic resource] : $b selected contributions from FDL 2016 / $c edited by Franco Fummi, Robert Wille.
246 3 $a FDL 2016
260 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2018.
300 $a vii, 116 p. : $b ill., digital ; $c 24 cm.
490 1 $a Lecture notes in electrical engineering, $x 1876-1100 ; $v v.454
505 0 $a Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
650 0 $a Formal methods (Computer science) $v Congresses. $3 622707
650 0 $a Software engineering $x Congresses. $3 696781
650 0 $a Computer software $x Verification $v Congresses. $3 844546
650 0 $a Software architecture $v Congresses. $3 838304
650 0 $a Computer hardware description languages $x Congresses. $3 703913
650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Processor Architectures. $3 892680
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 893838
700 1 $a Fummi, Franco. $3 3298541
700 1 $a Wille, Robert. $3 1245099
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer eBooks
830 0 $a Lecture notes in electrical engineering ; $v v.454. $3 3298542
856 4 0 $u http://dx.doi.org/10.1007/978-3-319-62920-9
950 $a Engineering (Springer-11647)