Language:
English
繁體中文
Help
回圖書館首頁
手機版館藏查詢
Login
Back
Switch To:
Labeled
|
MARC Mode
|
ISBD
Extraction of carrier mobility and i...
~
Chidambaram, Thenappan.
Linked to FindBook
Google Book
Amazon
博客來
Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method.
Record Type:
Electronic resources : Monograph/item
Title/Author:
Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method./
Author:
Chidambaram, Thenappan.
Description:
115 p.
Notes:
Source: Dissertation Abstracts International, Volume: 77-04(E), Section: B.
Contained By:
Dissertation Abstracts International77-04B(E).
Subject:
Nanoscience. -
Online resource:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3738904
ISBN:
9781339294117
Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method.
Chidambaram, Thenappan.
Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method.
- 115 p.
Source: Dissertation Abstracts International, Volume: 77-04(E), Section: B.
Thesis (Ph.D.)--State University of New York at Albany, 2015.
III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies <1MHz, cannot distinguish conducting and trapped carriers. In addition, the CV methods have to deal with high dispersion in the accumulation region that makes it a difficult task to measure the true oxide capacitance, Cox value. Another implication of these properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for D it and mobility. Here we employ gated Hall method to quantify the D it spectrum at the high-K oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values.
ISBN: 9781339294117Subjects--Topical Terms:
587832
Nanoscience.
Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method.
LDR
:02347nmm a2200289 4500
001
2070289
005
20160531114442.5
008
170521s2015 ||||||||||||||||| ||eng d
020
$a
9781339294117
035
$a
(MiAaPQ)AAI3738904
035
$a
AAI3738904
040
$a
MiAaPQ
$c
MiAaPQ
100
1
$a
Chidambaram, Thenappan.
$3
3185336
245
1 0
$a
Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method.
300
$a
115 p.
500
$a
Source: Dissertation Abstracts International, Volume: 77-04(E), Section: B.
500
$a
Adviser: Serge Oktyabrsky.
502
$a
Thesis (Ph.D.)--State University of New York at Albany, 2015.
520
$a
III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies <1MHz, cannot distinguish conducting and trapped carriers. In addition, the CV methods have to deal with high dispersion in the accumulation region that makes it a difficult task to measure the true oxide capacitance, Cox value. Another implication of these properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for D it and mobility. Here we employ gated Hall method to quantify the D it spectrum at the high-K oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values.
590
$a
School code: 0668.
650
4
$a
Nanoscience.
$3
587832
650
4
$a
Physics.
$3
516296
650
4
$a
Electrical engineering.
$3
649834
690
$a
0565
690
$a
0605
690
$a
0544
710
2
$a
State University of New York at Albany.
$b
Nanoscale Science and Engineering-Nanoscale Engineering.
$3
1674751
773
0
$t
Dissertation Abstracts International
$g
77-04B(E).
790
$a
0668
791
$a
Ph.D.
792
$a
2015
793
$a
English
856
4 0
$u
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3738904
based on 0 review(s)
Location:
ALL
電子資源
Year:
Volume Number:
Items
1 records • Pages 1 •
1
Inventory Number
Location Name
Item Class
Material type
Call number
Usage Class
Loan Status
No. of reservations
Opac note
Attachments
W9303157
電子資源
11.線上閱覽_V
電子書
EB
一般使用(Normal)
On shelf
0
1 records • Pages 1 •
1
Multimedia
Reviews
Add a review
and share your thoughts with other readers
Export
pickup library
Processing
...
Change password
Login