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IP cores design from specifications ...

Mohamed, Khaled Salah.

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IP cores design from specifications to production = modeling, verification, optimization, and protection /

Record Type:	Electronic resources : Monograph/item
Title/Author:	IP cores design from specifications to production/ by Khaled Salah Mohamed.
Reminder of title:	modeling, verification, optimization, and protection /
Author:	Mohamed, Khaled Salah.
Published:	Cham :Springer International Publishing : : 2016.,
Description:	ix, 154 p. :ill., digital ;24 cm.
[NT 15003449]:	1. Introduction -- 2. IP Cores Design from Specifications to Production: Modeling, Verification, Optimization, and Protection -- 3. Analyzing the Trade-off between Different Memory Cores and Controllers -- 4. SOC BUSES AND PERIPHERALS: FEATURES AND ARCHITECTURES -- 5. Verilog for Implementation and Verification -- 6. New Trends in SoC Verification: UVM, Bug Localization, Scan-Chain-Based Methodology, GA-Based Test Generation -- 7. Conclusions.
Contained By:	Springer eBooks
Subject:	Integrated circuits - Very large scale integration. -
Online resource:	http://dx.doi.org/10.1007/978-3-319-22035-2
ISBN:	9783319220352$q(electronic bk.)

IP cores design from specifications to production = modeling, verification, optimization, and protection /
Mohamed, Khaled Salah.

IP cores design from specifications to productionmodeling, verification, optimization, and protection /[electronic resource] :by Khaled Salah Mohamed. - Cham :Springer International Publishing :2016. - ix, 154 p. :ill., digital ;24 cm. - Analog circuits and signal processing,1872-082X. - Analog circuits and signal processing..

1. Introduction -- 2. IP Cores Design from Specifications to Production: Modeling, Verification, Optimization, and Protection -- 3. Analyzing the Trade-off between Different Memory Cores and Controllers -- 4. SOC BUSES AND PERIPHERALS: FEATURES AND ARCHITECTURES -- 5. Verilog for Implementation and Verification -- 6. New Trends in SoC Verification: UVM, Bug Localization, Scan-Chain-Based Methodology, GA-Based Test Generation -- 7. Conclusions.

ISBN: 9783319220352$q(electronic bk.)

Standard No.: 10.1007/978-3-319-22035-2doiSubjects--Topical Terms:

535389
Integrated circuits
--Very large scale integration.

LC Class. No.: TK7874.75 / .M64 2016

Dewey Class. No.: 621.395

IP cores design from specifications to production = modeling, verification, optimization, and protection /
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100 1 $a Mohamed, Khaled Salah. $3 2179135
245 1 0 $a IP cores design from specifications to production $h [electronic resource] : $b modeling, verification, optimization, and protection / $c by Khaled Salah Mohamed.
260 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2016.
300 $a ix, 154 p. : $b ill., digital ; $c 24 cm.
490 1 $a Analog circuits and signal processing, $x 1872-082X
505 0 $a 1. Introduction -- 2. IP Cores Design from Specifications to Production: Modeling, Verification, Optimization, and Protection -- 3. Analyzing the Trade-off between Different Memory Cores and Controllers -- 4. SOC BUSES AND PERIPHERALS: FEATURES AND ARCHITECTURES -- 5. Verilog for Implementation and Verification -- 6. New Trends in SoC Verification: UVM, Bug Localization, Scan-Chain-Based Methodology, GA-Based Test Generation -- 7. Conclusions.
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650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Processor Architectures. $3 892680
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 893838
710 2 $a SpringerLink (Online service) $3 836513
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830 0 $a Analog circuits and signal processing. $3 1565978
856 4 0 $u http://dx.doi.org/10.1007/978-3-319-22035-2
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