語系:
繁體中文
English
說明(常見問題)
回圖書館首頁
手機版館藏查詢
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
Electrical overstress (EOS) = device...
~
Voldman, Steven H.
FindBook
Google Book
Amazon
博客來
Electrical overstress (EOS) = devices, circuits, and systems /
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Electrical overstress (EOS)/ Steven H. Voldman.
其他題名:
devices, circuits, and systems /
作者:
Voldman, Steven H.
出版者:
Chichester, West Sussex, UK :Wiley, : 2014.,
面頁冊數:
1 online resource (xxiv, 344 p.)
標題:
Semiconductors - Failures. -
電子資源:
http://onlinelibrary.wiley.com/book/10.1002/9781118703328
ISBN:
9781118703342 (electronic bk.)
Electrical overstress (EOS) = devices, circuits, and systems /
Voldman, Steven H.
Electrical overstress (EOS)
devices, circuits, and systems /[electronic resource] :Steven H. Voldman. - Chichester, West Sussex, UK :Wiley,2014. - 1 online resource (xxiv, 344 p.) - ESD series. - ESD series..
Includes bibliographical references and index.
"Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This book teaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today's modern world. Look inside for extensive coverage on: Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena EOS sources in today's semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures EOS failures in both semiconductor devices, circuits and system. Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) EOS protection on-chip design practices and how they differ from ESD protection networks and solutions. Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment. Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems EOS testing and qualification techniques, and Practical off-chip ESD protection and system level solutions to provide more robust systems Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era"--
ISBN: 9781118703342 (electronic bk.)
LCCN: 2013026202Subjects--Topical Terms:
649356
Semiconductors
--Failures.
LC Class. No.: TK7871.852
Dewey Class. No.: 621.3815
Electrical overstress (EOS) = devices, circuits, and systems /
LDR
:03881cmm a22003978i 4500
001
2003087
003
OCoLC
005
20131025111124.0
006
m o d
007
cr |||||||||||
008
151223s2014 enk ob 001 0 eng
010
$a
2013026202
020
$a
9781118703342 (electronic bk.)
020
$a
1118703340 (electronic bk.)
020
$a
9781118703328 (electronic bk.)
020
$a
1118703324 (electronic bk.)
020
$z
9781118703335
020
$z
1118703332
020
$z
9781118511886 (hardback)
020
$a
1118511883 (hdbk.)
020
$a
9781118511886 (hdbk.)
020
$a
9781299831124 (MyiLibrary)
020
$a
1299831125 (MyiLibrary)
035
$a
(OCoLC)851285730
035
$a
ocn851285730
040
$a
DLC
$b
eng
$c
DLC
$d
OCLCO
$d
N
$d
IDEBK
$d
CDX
$d
CUS
$d
COO
050
1 0
$a
TK7871.852
082
0 0
$a
621.3815
$2
23
100
1
$a
Voldman, Steven H.
$3
2147253
245
1 0
$a
Electrical overstress (EOS)
$h
[electronic resource] :
$b
devices, circuits, and systems /
$c
Steven H. Voldman.
260
$a
Chichester, West Sussex, UK :
$b
Wiley,
$c
2014.
300
$a
1 online resource (xxiv, 344 p.)
490
1
$a
ESD series
504
$a
Includes bibliographical references and index.
520
$a
"Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This book teaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today's modern world. Look inside for extensive coverage on: Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena EOS sources in today's semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures EOS failures in both semiconductor devices, circuits and system. Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) EOS protection on-chip design practices and how they differ from ESD protection networks and solutions. Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment. Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems EOS testing and qualification techniques, and Practical off-chip ESD protection and system level solutions to provide more robust systems Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era"--
$c
Provided by publisher.
520
$a
"This book addresses EOS phenomena and distinguish it from other forms of phenomena such as electrostatic discharge (ESD), latchup, and EMC events"--
$c
Provided by publisher.
588
$a
Description based on online resource; title from PDF title page (Wiley, viewed September 23, 2013)
650
0
$a
Semiconductors
$x
Failures.
$3
649356
650
0
$a
Semiconductors
$x
Protection.
$3
2147634
650
0
$a
Transients (Electricity)
$3
687826
650
0
$a
Overvoltage.
$3
2148057
830
0
$a
ESD series.
$3
2148056
856
4 0
$u
http://onlinelibrary.wiley.com/book/10.1002/9781118703328
筆 0 讀者評論
館藏地:
全部
電子資源
出版年:
卷號:
館藏
1 筆 • 頁數 1 •
1
條碼號
典藏地名稱
館藏流通類別
資料類型
索書號
使用類型
借閱狀態
預約狀態
備註欄
附件
W9270997
電子資源
11.線上閱覽_V
電子書
EB TK7871.852
一般使用(Normal)
在架
0
1 筆 • 頁數 1 •
1
多媒體
評論
新增評論
分享你的心得
Export
取書館
處理中
...
變更密碼
登入