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Accuracy enhancement techniques in l...

Li, Jipeng.

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Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design./
作者:	Li, Jipeng.
面頁冊數:	120 p.
附註:	Source: Dissertation Abstracts International, Volume: 64-12, Section: B, page: 6244.
Contained By:	Dissertation Abstracts International64-12B.
標題:	Engineering, Electronics and Electrical. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3115471

Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design.
Li, Jipeng.

Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design. - 120 p.

Source: Dissertation Abstracts International, Volume: 64-12, Section: B, page: 6244.

Thesis (Ph.D.)--Oregon State University, 2004.

Pipelined analog to digital converters (ADCs) are very important building blocks in many electronic systems such as high quality video systems, high performance digital communication systems and high speed data acquisition systems. The rapid devSubjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design.
LDR:01601nmm 2200277 4500 001 1862632
005 20041119083404.5
008 130614s2004 eng d
035 $a (UnM)AAI3115471
035 $a AAI3115471
040 $a UnM $c UnM
100 1 $a Li, Jipeng. $3 1950175
245 1 0 $a Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design.
300 $a 120 p.
500 $a Source: Dissertation Abstracts International, Volume: 64-12, Section: B, page: 6244.
500 $a Adviser: Un-Ku Moon.
502 $a Thesis (Ph.D.)--Oregon State University, 2004.
520 $a Pipelined analog to digital converters (ADCs) are very important building blocks in many electronic systems such as high quality video systems, high performance digital communication systems and high speed data acquisition systems. The rapid dev
520 $a In this thesis, two novel accuracy improvement techniques to overcome the accuracy limit set by analog building blocks (opamps and capacitors) in the context of low-voltage and high-speed pipelined ADC design are presented. One is the time-shift
520 $a Two prototype ADCs have been designed and fabricated in 0.18mum CMOS technology as the experimental verification of the proposed techniques. The first ADC is a 1.8V 10-bit pipeline ADC which incorporated the time-shifted CDS technique to boost t
590 $a School code: 0172.
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0544
710 2 0 $a Oregon State University. $3 625720
773 0 $t Dissertation Abstracts International $g 64-12B.
790 1 0 $a Moon, Un-Ku, $e advisor
790 $a 0172
791 $a Ph.D.
792 $a 2004
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3115471