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A fully digital technique for the es...

Wang, Xuesheng.

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A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs./
作者:	Wang, Xuesheng.
面頁冊數:	88 p.
附註:	Source: Dissertation Abstracts International, Volume: 65-02, Section: B, page: 0947.
Contained By:	Dissertation Abstracts International65-02B.
標題:	Engineering, Electronics and Electrical. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3120784
ISBN:	0496681396

A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs.
Wang, Xuesheng.

A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. - 88 p.

Source: Dissertation Abstracts International, Volume: 65-02, Section: B, page: 0947.

Thesis (Ph.D.)--Oregon State University, 2004.

This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is then analyzed. Various techniques dealing with the DAC error are described and their drawbacks are pointed out. Based on the nature of the DAC error and the surrounding signals, a fully digital method to estimate the error from the ADC output and remove it is proposed. Simulation results are shown to support the effectiveness of the method. Simulations also show that the proposed technique can work together with the technique of adaptive compensation for quantization noise leakage in cascaded delta sigma (MASH) ADC cases. These two techniques are the foundation for the design of high speed, high resolution delta sigma ADCs with relaxed requirements on the analog circuits.

ISBN: 0496681396Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs.
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245 1 2 $a A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs.
300 $a 88 p.
500 $a Source: Dissertation Abstracts International, Volume: 65-02, Section: B, page: 0947.
500 $a Adviser: Gabor C. Temes.
502 $a Thesis (Ph.D.)--Oregon State University, 2004.
520 $a This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is then analyzed. Various techniques dealing with the DAC error are described and their drawbacks are pointed out. Based on the nature of the DAC error and the surrounding signals, a fully digital method to estimate the error from the ADC output and remove it is proposed. Simulation results are shown to support the effectiveness of the method. Simulations also show that the proposed technique can work together with the technique of adaptive compensation for quantization noise leakage in cascaded delta sigma (MASH) ADC cases. These two techniques are the foundation for the design of high speed, high resolution delta sigma ADCs with relaxed requirements on the analog circuits.
520 $a To verify the proposed technique, an experimental MASH ADC was built, including the design and fabrication of a chip of a second-order multi-bit delta sigma ADC in a 1.6mum CMOS technology. The measured results show that the proposed DAC correction technique is highly effective.
590 $a School code: 0172.
650 4 $a Engineering, Electronics and Electrical. $3 626636
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