語系:
繁體中文
English
說明(常見問題)
回圖書館首頁
手機版館藏查詢
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
A study of process variations and th...
~
Gopalakrishnan, Srinivasan.
FindBook
Google Book
Amazon
博客來
A study of process variations and their impact analysis in RF circuits.
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
A study of process variations and their impact analysis in RF circuits./
作者:
Gopalakrishnan, Srinivasan.
面頁冊數:
66 p.
附註:
Source: Masters Abstracts International, Volume: 44-04, page: 1927.
Contained By:
Masters Abstracts International44-04.
標題:
Engineering, Electronics and Electrical. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1431957
ISBN:
9780542499371
A study of process variations and their impact analysis in RF circuits.
Gopalakrishnan, Srinivasan.
A study of process variations and their impact analysis in RF circuits.
- 66 p.
Source: Masters Abstracts International, Volume: 44-04, page: 1927.
Thesis (M.S.E.E.)--State University of New York at Buffalo, 2006.
This thesis presents an in-depth empirical research to understand the impact of process variations in RF Circuits. We present a hierarchical two phase approach to study the impact of process based variations on device characteristics and circuit-level performance as well. The simulations based on Monte-Carlo techniques have been conducted extensively at different levels to gauge the impact of process variations. Such sensitivity analysis helps to identify the critical components for various RF Cores at both layout/fabrication level, as well as circuit-level, which affect the performance of the system in the face of process based variations. This knowledge helps designers make necessary changes in the design phase to improve yield at the production stage. Thus, the hierarchical defect mapping based on device/component performance and sensitivity helps in optimizing circuit design by suitable consideration of component topologies for robust design. From a testing perspective, the defect analysis can help identify realistic faults which are bound to occur in RF Circuits. This helps to reduce the test signal generation effort to detect different types of faults in these circuits, which in turn results in cost savings in the testing process. This work also focuses on exploratory investigations to find alternative techniques to Monte-Carlo simulation based approach. Further, new ideas based on extending fault equivalence concepts between catastrophic and parametric faults for ease of test generation in RF Circuits have also been presented. (Abstract shortened by UMI.)
ISBN: 9780542499371Subjects--Topical Terms:
626636
Engineering, Electronics and Electrical.
A study of process variations and their impact analysis in RF circuits.
LDR
:02520nmm 2200277 4500
001
1821357
005
20061115073017.5
008
130610s2006 eng d
020
$a
9780542499371
035
$a
(UnM)AAI1431957
035
$a
AAI1431957
040
$a
UnM
$c
UnM
100
1
$a
Gopalakrishnan, Srinivasan.
$3
1910541
245
1 2
$a
A study of process variations and their impact analysis in RF circuits.
300
$a
66 p.
500
$a
Source: Masters Abstracts International, Volume: 44-04, page: 1927.
500
$a
Advisers: James J. Whalen; Shambhu J. Upadhyaya.
502
$a
Thesis (M.S.E.E.)--State University of New York at Buffalo, 2006.
520
$a
This thesis presents an in-depth empirical research to understand the impact of process variations in RF Circuits. We present a hierarchical two phase approach to study the impact of process based variations on device characteristics and circuit-level performance as well. The simulations based on Monte-Carlo techniques have been conducted extensively at different levels to gauge the impact of process variations. Such sensitivity analysis helps to identify the critical components for various RF Cores at both layout/fabrication level, as well as circuit-level, which affect the performance of the system in the face of process based variations. This knowledge helps designers make necessary changes in the design phase to improve yield at the production stage. Thus, the hierarchical defect mapping based on device/component performance and sensitivity helps in optimizing circuit design by suitable consideration of component topologies for robust design. From a testing perspective, the defect analysis can help identify realistic faults which are bound to occur in RF Circuits. This helps to reduce the test signal generation effort to detect different types of faults in these circuits, which in turn results in cost savings in the testing process. This work also focuses on exploratory investigations to find alternative techniques to Monte-Carlo simulation based approach. Further, new ideas based on extending fault equivalence concepts between catastrophic and parametric faults for ease of test generation in RF Circuits have also been presented. (Abstract shortened by UMI.)
590
$a
School code: 0656.
650
4
$a
Engineering, Electronics and Electrical.
$3
626636
690
$a
0544
710
2 0
$a
State University of New York at Buffalo.
$3
1017814
773
0
$t
Masters Abstracts International
$g
44-04.
790
1 0
$a
Whalen, James J.,
$e
advisor
790
1 0
$a
Upadhyaya, Shambhu J.,
$e
advisor
790
$a
0656
791
$a
M.S.E.E.
792
$a
2006
856
4 0
$u
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1431957
筆 0 讀者評論
館藏地:
全部
電子資源
出版年:
卷號:
館藏
1 筆 • 頁數 1 •
1
條碼號
典藏地名稱
館藏流通類別
資料類型
索書號
使用類型
借閱狀態
預約狀態
備註欄
附件
W9212220
電子資源
11.線上閱覽_V
電子書
EB
一般使用(Normal)
在架
0
1 筆 • 頁數 1 •
1
多媒體
評論
新增評論
分享你的心得
Export
取書館
處理中
...
變更密碼
登入