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0.18 micrometers CMOS piezoelectric ...

Wang, Shirui.

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0.18 micrometers CMOS piezoelectric impedance-based structural health monitoring integrated circuit design.

Record Type:	Language materials, printed : Monograph/item
Title/Author:	0.18 micrometers CMOS piezoelectric impedance-based structural health monitoring integrated circuit design./
Author:	Wang, Shirui.
Description:	146 p.
Notes:	Source: Dissertation Abstracts International, Volume: 71-05, Section: B, page: 3266.
Contained By:	Dissertation Abstracts International71-05B.
Subject:	Engineering, Computer. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3407595
ISBN:	9781109775174

0.18 micrometers CMOS piezoelectric impedance-based structural health monitoring integrated circuit design.
Wang, Shirui.

0.18 micrometers CMOS piezoelectric impedance-based structural health monitoring integrated circuit design. - 146 p.

Source: Dissertation Abstracts International, Volume: 71-05, Section: B, page: 3266.

Thesis (Ph.D.)--North Dakota State University, 2010.

Piezoelectric materials constitute a class of intelligent materials which are helpful for monitoring the structural integrity. The principle of the piezoelectric impedance-based structural health monitoring (SHM) technique is to measure the electrical impedance of a piezoelectric patch attached to a structure over a certain frequency range. Electrical impedance variations indicate physical changes in the structure due to coupling between the electrical impedance and the mechanical impedance. Traditional methods use an impedance analyzer which increases the inspection cost. The objective of this work is to develop an electronic circuit for the piezoelectric impedance-based structural health monitoring. The circuit, which consists of a digitally-controlled oscillator, a peak detector, a digital-to-analog converter, a differential amplifier, a comparator, counters, and a control circuit, can monitor the electrical impedance variations of a piezoelectric patch attached to a structure. The frequency range is from 7.47 kHz to 277.29 kHz. This frequency range covers the sensitive range of the piezoelectric structural integrity. The circuit design has a power consumption of 18.15 mW, and a chip area of 1.03 x 2.30 mm2. The cost of the final design will be much lower than that of an impedance analyzer. Using a wireless communication circuit, a sensor network connecting several SHM sensors might be established in the future.

ISBN: 9781109775174Subjects--Topical Terms:

1669061
Engineering, Computer.

0.18 micrometers CMOS piezoelectric impedance-based structural health monitoring integrated circuit design.
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020 $a 9781109775174
035 $a (UMI)AAI3407595
035 $a AAI3407595
040 $a UMI $c UMI
100 1 $a Wang, Shirui. $3 1678836
245 1 0 $a 0.18 micrometers CMOS piezoelectric impedance-based structural health monitoring integrated circuit design.
300 $a 146 p.
500 $a Source: Dissertation Abstracts International, Volume: 71-05, Section: B, page: 3266.
500 $a Adviser: Chao Yon.
502 $a Thesis (Ph.D.)--North Dakota State University, 2010.
520 $a Piezoelectric materials constitute a class of intelligent materials which are helpful for monitoring the structural integrity. The principle of the piezoelectric impedance-based structural health monitoring (SHM) technique is to measure the electrical impedance of a piezoelectric patch attached to a structure over a certain frequency range. Electrical impedance variations indicate physical changes in the structure due to coupling between the electrical impedance and the mechanical impedance. Traditional methods use an impedance analyzer which increases the inspection cost. The objective of this work is to develop an electronic circuit for the piezoelectric impedance-based structural health monitoring. The circuit, which consists of a digitally-controlled oscillator, a peak detector, a digital-to-analog converter, a differential amplifier, a comparator, counters, and a control circuit, can monitor the electrical impedance variations of a piezoelectric patch attached to a structure. The frequency range is from 7.47 kHz to 277.29 kHz. This frequency range covers the sensitive range of the piezoelectric structural integrity. The circuit design has a power consumption of 18.15 mW, and a chip area of 1.03 x 2.30 mm2. The cost of the final design will be much lower than that of an impedance analyzer. Using a wireless communication circuit, a sensor network connecting several SHM sensors might be established in the future.
590 $a School code: 0157.
650 4 $a Engineering, Computer. $3 1669061
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0464
690 $a 0544
710 2 $a North Dakota State University. $3 1021724
773 0 $t Dissertation Abstracts International $g 71-05B.
790 1 0 $a Yon, Chao, $e advisor
790 $a 0157
791 $a Ph.D.
792 $a 2010
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3407595