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Taraate, Vaibbhav.

Overview
Works: 0 works in 9 publications in 1 languages
Titles
Logic synthesis and SOC prototyping = RTL design using VHDL / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
Digital logic design sing Verilog = coding and RTL synthesis / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
Digital design techniques and exercises = a practice book for digital logic design / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
Digital logic design using Verilog = coding and RTL synthesis / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
Digital design from the VLSI perspective = concepts for VLSI beginners / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
PLD based design with VHDL = RTL design, synthesis and implementation / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
ASIC design and synthesis = RTL design using Verilog / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
SystemVerilog for hardware description = RTL design and verification / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
Advanced HDL synthesis and SOC prototyping = RTL design using verilog / by: Taraate, Vaibbhav.; SpringerLink (Online service) (Electronic resources)
 
 
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