Integrated circuits - Very large scale integration - Computer-aided design.

Verification by error modeling : = using testing techniques in hardware verification by: (Language materials, printed)

Formal hardware verification = methods and systems in comparison / by: (Language materials, printed)

Algorithms for VLSI physical design automation by: (Language materials, printed)

Principles of verifiable RTL design = a functional coding style supporting verification processes in Verilog / by: (Language materials, printed)

Harnessing VLSI system design with EDA tools by: (Electronic resources)

Statistical performance analysis and modeling techniques for nanometer VLSI designs by: (Electronic resources)

Computer-aided design of microfluidic very large scale integration (mVLSI) biochips = design automation, testing, and design-for-testability / by: (Electronic resources)

Machine learning in VLSI computer-aided design by: (Electronic resources)