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Verification and validation in syste...

Debbabi, Mourad.

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Verification and validation in systems engineering = assessing UML/SysML design models /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Verification and validation in systems engineering/ by Mourad Debbabi ... [et al.].
其他題名:	assessing UML/SysML design models /
其他作者:	Debbabi, Mourad.
出版者:	Berlin, Heidelberg :Springer-Verlag Berlin Heidelberg, : 2010.,
面頁冊數:	xxvi, 248 p. :ill., digital ;24 cm.
Contained By:	Springer eBooks
標題:	Computer software - Validation. -
電子資源:	http://dx.doi.org/10.1007/978-3-642-15228-3
ISBN:	9783642152276 (paper)

Verification and validation in systems engineering = assessing UML/SysML design models /
Verification and validation in systems engineeringassessing UML/SysML design models /[electronic resource] :by Mourad Debbabi ... [et al.]. - Berlin, Heidelberg :Springer-Verlag Berlin Heidelberg,2010. - xxvi, 248 p. :ill., digital ;24 cm.

ISBN: 9783642152276 (paper)Subjects--Topical Terms:

911561
Computer software
--Validation.

LC Class. No.: TA168 / .V47 2010

Dewey Class. No.: 620.001171

Verification and validation in systems engineering = assessing UML/SysML design models /
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