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The gm/ID Methodology, a sizing tool...

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The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuits = the semi-empirical and compact model approaches /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuits/ by Paul Jespers.
Reminder of title:	the semi-empirical and compact model approaches /
Author:	Jespers, Paul.
Published:	Boston, MA :Springer Science+Business Media, LLC, : 2010.,
Description:	xvi, 171 p. :ill., digital ;24 cm.
Series:	Analog circuits and signal processing
Contained By:	Springer eBooks
Subject:	Linear integrated circuits - Design and construction. -
Online resource:	http://dx.doi.org/10.1007/978-0-387-47101-3
ISBN:	9780387471006 (paper)

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuits = the semi-empirical and compact model approaches /
Jespers, Paul.

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuitsthe semi-empirical and compact model approaches /[electronic resource] :by Paul Jespers. - Boston, MA :Springer Science+Business Media, LLC,2010. - xvi, 171 p. :ill., digital ;24 cm. - Analog circuits and signal processing.

ISBN: 9780387471006 (paper)Subjects--Topical Terms:

655292
Linear integrated circuits
--Design and construction.

LC Class. No.: TK7871.99.M44 / J47 2010

Dewey Class. No.: 621.3815

The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuits = the semi-empirical and compact model approaches /
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100 1 $a Jespers, Paul. $3 1086200
245 1 4 $a The gm/ID Methodology, a sizing tool for low-voltage analog CMOS circuits $h [electronic resource] : $b the semi-empirical and compact model approaches / $c by Paul Jespers.
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300 $a xvi, 171 p. : $b ill., digital ; $c 24 cm.
440 0 $a Analog circuits and signal processing
650 0 $a Linear integrated circuits $x Design and construction. $3 655292
650 0 $a Low voltage integrated circuits $x Design and construction. $3 699876
650 0 $a Metal oxide semiconductors, Complementary $x Design and construction. $3 665042
650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Processor Architectures. $3 892680
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