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Minimizing and exploiting leakage in...

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Jayakumar, Nikhil.

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Minimizing and exploiting leakage in VLSI design

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Minimizing and exploiting leakage in VLSI design/ by Nikhil Jayakumar ... [et al.].
其他作者:	Jayakumar, Nikhil.
出版者:	Boston, MA :Springer Science+Business Media, LLC, : 2010.,
面頁冊數:	xxvii, 214 p. :ill., digital ;24 cm.
Contained By:	Springer eBooks
標題:	Integrated circuits - Very large scale integration -
電子資源:	http://dx.doi.org/10.1007/978-1-4419-0950-3
ISBN:	9781441909497 (paper)

Minimizing and exploiting leakage in VLSI design
Minimizing and exploiting leakage in VLSI design[electronic resource] /by Nikhil Jayakumar ... [et al.]. - Boston, MA :Springer Science+Business Media, LLC,2010. - xxvii, 214 p. :ill., digital ;24 cm.

ISBN: 9781441909497 (paper)Subjects--Topical Terms:

629093
Integrated circuits
--Very large scale integration

LC Class. No.: TK7874.75 / .M56 2010

Dewey Class. No.: 621.395

Minimizing and exploiting leakage in VLSI design
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245 0 0 $a Minimizing and exploiting leakage in VLSI design $h [electronic resource] / $c by Nikhil Jayakumar ... [et al.].
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300 $a xxvii, 214 p. : $b ill., digital ; $c 24 cm.
650 0 $a Integrated circuits $x Very large scale integration $x Design. $3 629093
650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Computer-Aided Engineering (CAD, CAE) and Design. $3 892568
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