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Analysis and design of resilient VLS...

Khatri, Sunil P.

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Analysis and design of resilient VLSI circuits = mitigating soft errors and process variations /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Analysis and design of resilient VLSI circuits/ by Rajesh Garg, Sunil P. Khatri.
其他題名:	mitigating soft errors and process variations /
作者:	Garg, Rajesh.
其他作者:	Khatri, Sunil P.
出版者:	Boston, MA :Springer-Verlag US, : 2010.,
面頁冊數:	xxiii, 212 p. :ill., digital ;25 cm.
Contained By:	Springer eBooks
標題:	Integrated circuits - Very large scale integration. -
電子資源:	http://dx.doi.org/10.1007/978-1-4419-0931-2
ISBN:	9781441909305 (paper)

Analysis and design of resilient VLSI circuits = mitigating soft errors and process variations /
Garg, Rajesh.

Analysis and design of resilient VLSI circuitsmitigating soft errors and process variations /[electronic resource] :by Rajesh Garg, Sunil P. Khatri. - Boston, MA :Springer-Verlag US,2010. - xxiii, 212 p. :ill., digital ;25 cm.

ISBN: 9781441909305 (paper)Subjects--Topical Terms:

535389
Integrated circuits
--Very large scale integration.

LC Class. No.: TK7874.75 / .G37 2010

Dewey Class. No.: 621.395

Analysis and design of resilient VLSI circuits = mitigating soft errors and process variations /
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