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Logic synthesis and verification alg...
~
Somenzi, Fabio.
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Logic synthesis and verification algorithms
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Logic synthesis and verification algorithms/ by Gary D. Hachtel, Fabio Somenzi.
Author:
Hachtel, Gary D.
other author:
Somenzi, Fabio.
Published:
Boston :Kluwer Academic Publishers, : c2002.,
Description:
xxxi, 564 p. :ill., digital ;26 cm.
Contained By:
Springer e-books
Subject:
Computer-aided design. -
Online resource:
http://dx.doi.org/10.1007/b117060
ISBN:
9780306475924 (electronic bk.)
Logic synthesis and verification algorithms
Hachtel, Gary D.
Logic synthesis and verification algorithms
[electronic resource] /by Gary D. Hachtel, Fabio Somenzi. - Boston :Kluwer Academic Publishers,c2002. - xxxi, 564 p. :ill., digital ;26 cm.
ISBN: 9780306475924 (electronic bk.)Subjects--Topical Terms:
531217
Computer-aided design.
LC Class. No.: TK7874.75 / .H33 2002
Dewey Class. No.: 621.395
Logic synthesis and verification algorithms
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9780306475924 (electronic bk.)
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9780792397465 (paper)
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978-0-7923-9746-5
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TK7874.75
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.H33 2002
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621.395
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Hachtel, Gary D.
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Logic synthesis and verification algorithms
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[electronic resource] /
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by Gary D. Hachtel, Fabio Somenzi.
260
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Boston :
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c2002.
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Kluwer Academic Publishers,
300
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xxxi, 564 p. :
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ill., digital ;
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26 cm.
650
0
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Computer-aided design.
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531217
650
0
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Integrated circuits
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Verification.
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827163
650
0
$a
Integrated circuits
$x
Very large scale integration
$x
Design
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Data processing.
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650
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Logic design
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Data processing.
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649530
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Somenzi, Fabio.
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1003461
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SpringerLink (Online service)
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836513
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Springer e-books
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http://dx.doi.org/10.1007/b117060
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Engineering
based on 0 review(s)
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Volume Number:
Items
1 records • Pages 1 •
1
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No. of reservations
Opac note
Attachments
W9087840
電子資源
11.線上閱覽_V
電子書
EB W9087840
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0
1 records • Pages 1 •
1
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