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Embedded DSP processor design = appl...

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Embedded DSP processor design = application specific instruction set processors /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Embedded DSP processor design/ Dake Liu.
其他題名:	application specific instruction set processors /
作者:	Liu, Dake,
出版者:	Amsterdam ;Morgan Kaufmann/Elsevier, : c2008.,
面頁冊數:	xxvi, 778 p. :ill. ;25 cm.
叢書名:	The Morgan Kaufmann series in systems on silicon
內容註:	Introduction -- Numerical representation and finite-length DSP -- DSP architectures -- DSP ASIP design flow -- A simple DSP core : the junior processor -- Code profiling for ASIP design -- Assembly instruction set design -- Software development toolchain -- Evaluation of an instruction set -- Design of DSP microarchitecture -- Design of register file and register bus -- ALU HW implementation -- MAC hardware implementation -- Control path design -- Design of memory subsystems -- DSP core peripherals -- Design for DSP functional acceleration -- Real-time fixed-point DSP firmware -- ASIP integration and verification -- Parallel streaming signal processing.
標題:	Application-specific integrated circuits. -
電子資源:	http://www.sciencedirect.com/science/book/9780123741233An electronic book accessible through the World Wide Web; click for information
ISBN:	0123741238

Embedded DSP processor design = application specific instruction set processors /
Liu, Dake,1957-

Embedded DSP processor designapplication specific instruction set processors /[electronic resource] :Dake Liu. - Amsterdam ;Morgan Kaufmann/Elsevier,c2008. - xxvi, 778 p. :ill. ;25 cm. - The Morgan Kaufmann series in systems on silicon.

Includes bibliographical references and index.

Introduction -- Numerical representation and finite-length DSP -- DSP architectures -- DSP ASIP design flow -- A simple DSP core : the junior processor -- Code profiling for ASIP design -- Assembly instruction set design -- Software development toolchain -- Evaluation of an instruction set -- Design of DSP microarchitecture -- Design of register file and register bus -- ALU HW implementation -- MAC hardware implementation -- Control path design -- Design of memory subsystems -- DSP core peripherals -- Design for DSP functional acceleration -- Real-time fixed-point DSP firmware -- ASIP integration and verification -- Parallel streaming signal processing.

This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers. Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples. FOR INSTRUCTORS: To obtain access to the solutions manual for this title simply register on our textbook website (textbooks.elsevier.com)and request access to the Computer Science or Electronics and Electrical Engineering subject area. Once approved (usually within one business day) you will be able to access all of the instructor-only materials through the ";Instructor Manual"; link on this book's full web page. * Instruction set design for application specific processors based on fast application profiling * Micro architecture design methodology * Micro architecture design details based on real examples * Extendable architecture design protocols * Design for efficient memory sub systems (minimizing on chip memory and cost) * Real example designs based on extensive, industrial experiences.

Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2008.

Mode of access: World Wide Web.

ISBN: 0123741238

Source: 140401:140539Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:

1000335
Application-specific integrated circuits.
Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: TK7895.E42 / L58 2008eb

Dewey Class. No.: 621.39/16

Embedded DSP processor design = application specific instruction set processors /
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300 $a xxvi, 778 p. : $b ill. ; $c 25 cm.
440 4 $a The Morgan Kaufmann series in systems on silicon
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505 0 $a Introduction -- Numerical representation and finite-length DSP -- DSP architectures -- DSP ASIP design flow -- A simple DSP core : the junior processor -- Code profiling for ASIP design -- Assembly instruction set design -- Software development toolchain -- Evaluation of an instruction set -- Design of DSP microarchitecture -- Design of register file and register bus -- ALU HW implementation -- MAC hardware implementation -- Control path design -- Design of memory subsystems -- DSP core peripherals -- Design for DSP functional acceleration -- Real-time fixed-point DSP firmware -- ASIP integration and verification -- Parallel streaming signal processing.
520 $a This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers. Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples. FOR INSTRUCTORS: To obtain access to the solutions manual for this title simply register on our textbook website (textbooks.elsevier.com)and request access to the Computer Science or Electronics and Electrical Engineering subject area. Once approved (usually within one business day) you will be able to access all of the instructor-only materials through the ";Instructor Manual"; link on this book's full web page. * Instruction set design for application specific processors based on fast application profiling * Micro architecture design methodology * Micro architecture design details based on real examples * Extendable architecture design protocols * Design for efficient memory sub systems (minimizing on chip memory and cost) * Real example designs based on extensive, industrial experiences.
533 $a Electronic reproduction. $b Amsterdam : $c Elsevier Science & Technology, $d 2008. $n Mode of access: World Wide Web. $n System requirements: Web browser. $n Title from title screen (viewed on Dec. 9, 2008). $n Access may be restricted to users at subscribing institutions.
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