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Power-Efficient Computer Architectur...

Wu, Di.

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Power-Efficient Computer Architecture via Unary and Approximate Computing.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Power-Efficient Computer Architecture via Unary and Approximate Computing./
Author:	Wu, Di.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2023,
Description:	282 p.
Notes:	Source: Dissertations Abstracts International, Volume: 85-02, Section: B.
Contained By:	Dissertations Abstracts International85-02B.
Subject:	Computer engineering. -
Online resource:	https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=30631023
ISBN:	9798380041829

Power-Efficient Computer Architecture via Unary and Approximate Computing.
Wu, Di.

Power-Efficient Computer Architecture via Unary and Approximate Computing. - Ann Arbor : ProQuest Dissertations & Theses, 2023 - 282 p.

Source: Dissertations Abstracts International, Volume: 85-02, Section: B.

Thesis (Ph.D.)--The University of Wisconsin - Madison, 2023.

This item must not be sold to any third party vendors.

In the last decade, deep learning has gained soaring popularity in both academia and industry, playing an indispensable role in many aspects of human lives. The resource-intensive nature of deep neural networks (DNNs), especially its core operation, general matrix multiply (GEMM), has prompted extensive efforts to optimize the execution on conventional hardware, aiming to democratize the transformative capabilities of deep learning technology. However, conventional hardware with binary computing does not exhibit satisfactory hardware efficiency. To yield unprecedented levels of hardware efficiency to enable new applications, my research leverages novel unary computing and approximate computing, which diverge from conventional binary computing. The primary focus of my research is on the exploration of power-efficient computer architecture using unary computing and approximate computing, especially within the context of deep learning. Unary computing utilizes extremely simple hardware to manipulate data in the form of serial bitstreams. My research on unary computing answers two questions: 1) what are the fundamental challenges of unary computing and the corresponding solutions? 2) how to design power-efficient computer architecture using unary computing? My research holistically presents how to understand, research, leverage unary computing, via innovations across multiple design stacks, including theory, simulation, circuit, architecture and application. This research targets mainly GEMM operations, with extended research on nonlinear operations. On the other hand, approximate computing intentionally introduces artificial defects to the computation, while maintaining the associated errors at an acceptably low level. My research on approximate computing answers two questions: 1) given certain fault tolerance, how to make trade-offs between the accuracy and energy? 2) given the expensiveness of complex nonlinear operations, how to minimize the hardware area and power overheads? My research attempts to identify the best trade-offs between DNN accuracy and hardware energy, achieving dynamic accuracy and energy scaling at both the single operation level and the DNN level, ultimately meeting the varying demands in various application scenarios. This research targets emerging DNNs with heavy and complex nonlinear operations, in addition to GEMM operations.

ISBN: 9798380041829Subjects--Topical Terms:

621879
Computer engineering.
Subjects--Index Terms:

Approximate computing

Power-Efficient Computer Architecture via Unary and Approximate Computing.
LDR:03676nmm a2200409 4500 001 2395542
005 20240517104618.5
006 m o d
007 cr#unu||||||||
008 251215s2023 ||||||||||||||||| ||eng d
020 $a 9798380041829
035 $a (MiAaPQ)AAI30631023
035 $a AAI30631023
040 $a MiAaPQ $c MiAaPQ
100 1 $a Wu, Di. $3 1018601
245 1 0 $a Power-Efficient Computer Architecture via Unary and Approximate Computing.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2023
300 $a 282 p.
500 $a Source: Dissertations Abstracts International, Volume: 85-02, Section: B.
500 $a Advisor: San Miguel, Joshua.
502 $a Thesis (Ph.D.)--The University of Wisconsin - Madison, 2023.
506 $a This item must not be sold to any third party vendors.
520 $a In the last decade, deep learning has gained soaring popularity in both academia and industry, playing an indispensable role in many aspects of human lives. The resource-intensive nature of deep neural networks (DNNs), especially its core operation, general matrix multiply (GEMM), has prompted extensive efforts to optimize the execution on conventional hardware, aiming to democratize the transformative capabilities of deep learning technology. However, conventional hardware with binary computing does not exhibit satisfactory hardware efficiency. To yield unprecedented levels of hardware efficiency to enable new applications, my research leverages novel unary computing and approximate computing, which diverge from conventional binary computing. The primary focus of my research is on the exploration of power-efficient computer architecture using unary computing and approximate computing, especially within the context of deep learning. Unary computing utilizes extremely simple hardware to manipulate data in the form of serial bitstreams. My research on unary computing answers two questions: 1) what are the fundamental challenges of unary computing and the corresponding solutions? 2) how to design power-efficient computer architecture using unary computing? My research holistically presents how to understand, research, leverage unary computing, via innovations across multiple design stacks, including theory, simulation, circuit, architecture and application. This research targets mainly GEMM operations, with extended research on nonlinear operations. On the other hand, approximate computing intentionally introduces artificial defects to the computation, while maintaining the associated errors at an acceptably low level. My research on approximate computing answers two questions: 1) given certain fault tolerance, how to make trade-offs between the accuracy and energy? 2) given the expensiveness of complex nonlinear operations, how to minimize the hardware area and power overheads? My research attempts to identify the best trade-offs between DNN accuracy and hardware energy, achieving dynamic accuracy and energy scaling at both the single operation level and the DNN level, ultimately meeting the varying demands in various application scenarios. This research targets emerging DNNs with heavy and complex nonlinear operations, in addition to GEMM operations.
590 $a School code: 0262.
650 4 $a Computer engineering. $3 621879
650 4 $a Electrical engineering. $3 649834
653 $a Approximate computing
653 $a Brain computer interface
653 $a Computer architecture
653 $a Deep learning
653 $a Power efficiency
653 $a Unary computing
690 $a 0464
690 $a 0544
690 $a 0800
710 2 $a The University of Wisconsin - Madison. $b Electrical Engineering. $3 2095968
773 0 $t Dissertations Abstracts International $g 85-02B.
790 $a 0262
791 $a Ph.D.
792 $a 2023
793 $a English
856 4 0 $u https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=30631023