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Designing a Functional Programming Architecture for the Internet of Things.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Designing a Functional Programming Architecture for the Internet of Things./
Author:	Pope, Jeremy.
Description:	1 online resource (31 pages)
Notes:	Source: Dissertations Abstracts International, Volume: 84-03, Section: B.
Contained By:	Dissertations Abstracts International84-03B.
Subject:	Language. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=29290653click for full text (PQDT)
ISBN:	9798845463821

Designing a Functional Programming Architecture for the Internet of Things.
Pope, Jeremy.

Designing a Functional Programming Architecture for the Internet of Things. - 1 online resource (31 pages)

Source: Dissertations Abstracts International, Volume: 84-03, Section: B.

Thesis (Licentiate)--Chalmers Tekniska Hogskola (Sweden), 2022.

Includes bibliographical references

As the Internet of Things (IoT) grows, so too do security concerns: as well as typically having access to sensors and actuators, IoT devices are often programmed using bug-prone, low-level languages. Such a combination results in vulnerabilities that pose risks to privacy and safety.This thesis aims to address this by making it possible to run high-level functional programs on IoT devices, a daunting prospect with traditional hardware due to the overheads of functional programming runtimes. To accomplish this, an architecture and partial implementation of a "natively functional" processor for IoT, named Cephalopode, is presented. The processor performs both graph reduction and garbage collection directly, without requiring an expensive software runtime.Implementing Cephalopode raised several opportunities for improving the process of hardware design. To that end, this thesis presents the finite state machine editor Stately and the high-level language Bifrost. Stately raises the level of abstraction of finite state machines enough to avoid a proliferation of edges during design, while maintaining efficiency and low-level control. Bifrost offers a higher-level approach to hardware design, allowing complex algorithmic processes-in particular those that communicate extensively with other components-to be described in an imperative language and compiled to an RTL-level circuit model.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2023

Mode of access: World Wide Web

ISBN: 9798845463821Subjects--Topical Terms:

643551
Language.
Index Terms--Genre/Form:

542853
Electronic books.

Designing a Functional Programming Architecture for the Internet of Things.
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500 $a Source: Dissertations Abstracts International, Volume: 84-03, Section: B.
500 $a Advisor: Seger, Carl.
502 $a Thesis (Licentiate)--Chalmers Tekniska Hogskola (Sweden), 2022.
504 $a Includes bibliographical references
520 $a As the Internet of Things (IoT) grows, so too do security concerns: as well as typically having access to sensors and actuators, IoT devices are often programmed using bug-prone, low-level languages. Such a combination results in vulnerabilities that pose risks to privacy and safety.This thesis aims to address this by making it possible to run high-level functional programs on IoT devices, a daunting prospect with traditional hardware due to the overheads of functional programming runtimes. To accomplish this, an architecture and partial implementation of a "natively functional" processor for IoT, named Cephalopode, is presented. The processor performs both graph reduction and garbage collection directly, without requiring an expensive software runtime.Implementing Cephalopode raised several opportunities for improving the process of hardware design. To that end, this thesis presents the finite state machine editor Stately and the high-level language Bifrost. Stately raises the level of abstraction of finite state machines enough to avoid a proliferation of edges during design, while maintaining efficiency and low-level control. Bifrost offers a higher-level approach to hardware design, allowing complex algorithmic processes-in particular those that communicate extensively with other components-to be described in an imperative language and compiled to an RTL-level circuit model.
533 $a Electronic reproduction. $b Ann Arbor, Mich. : $c ProQuest, $d 2023
538 $a Mode of access: World Wide Web
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650 4 $a Web studies. $3 2122754
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