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In-Database Machine Learning on Reconfigurable Dataflow Accelerators.
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
In-Database Machine Learning on Reconfigurable Dataflow Accelerators./
作者:
Vilim, Matthew.
出版者:
Ann Arbor : ProQuest Dissertations & Theses, : 2021,
面頁冊數:
120 p.
附註:
Source: Dissertations Abstracts International, Volume: 83-03, Section: A.
Contained By:
Dissertations Abstracts International83-03A.
標題:
Flexibility. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=28688324
ISBN:
9798544204022
In-Database Machine Learning on Reconfigurable Dataflow Accelerators.
Vilim, Matthew.
In-Database Machine Learning on Reconfigurable Dataflow Accelerators.
- Ann Arbor : ProQuest Dissertations & Theses, 2021 - 120 p.
Source: Dissertations Abstracts International, Volume: 83-03, Section: A.
Thesis (Ph.D.)--Stanford University, 2021.
This item must not be sold to any third party vendors.
Stagnant cpu performance is driving an explosion in domain-specific architectures to supplement cpus for data-intensive workloads in data centers [1, 2, 3, 4]. These accelerators sacrifice generality and programmability beyond their target domain in exchange for higher-performance [5, 1].However, accelerator deployment in data centers remains limited outside all but the most ubiquitous of application domains like machine learning [5]. High-performance systems require large dice in advanced process nodes with many supporting resources like high-bandwidth memory. As a result, to justify the price that comes with highperformance ic design, designers building non-ml accelerators are left with a choice: either piggyback on ml accelerators-giving up some efficiency but taking advantage of supporting hardware resources-or build more-efficient but less-advanced bespoke hardware.In this work, we show that reconfigurable dataflow accelerators (rdas) are a practical alternative to building fixed-function designs per application domain. We extend Plasticine [5]-a previously proposed ml-focused rda- with low-overhead, microarchitectural extensions to support analytic database queries. These extensions increase area by just 4 %, and the unified accelerator outperforms a multi-core software baseline by 1500 x.Finally, we show how to re-purpose these extensions to implement data structures like trees and hash tables that are critical to asymptotically optimal query plans. We introduce a threading model for vector dataflow accelerators that extracts parallelism from data structures with irregular control flow using fine-grained thread scheduling- outperforming a gpu by 8x.
ISBN: 9798544204022Subjects--Topical Terms:
3560705
Flexibility.
In-Database Machine Learning on Reconfigurable Dataflow Accelerators.
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Stagnant cpu performance is driving an explosion in domain-specific architectures to supplement cpus for data-intensive workloads in data centers [1, 2, 3, 4]. These accelerators sacrifice generality and programmability beyond their target domain in exchange for higher-performance [5, 1].However, accelerator deployment in data centers remains limited outside all but the most ubiquitous of application domains like machine learning [5]. High-performance systems require large dice in advanced process nodes with many supporting resources like high-bandwidth memory. As a result, to justify the price that comes with highperformance ic design, designers building non-ml accelerators are left with a choice: either piggyback on ml accelerators-giving up some efficiency but taking advantage of supporting hardware resources-or build more-efficient but less-advanced bespoke hardware.In this work, we show that reconfigurable dataflow accelerators (rdas) are a practical alternative to building fixed-function designs per application domain. We extend Plasticine [5]-a previously proposed ml-focused rda- with low-overhead, microarchitectural extensions to support analytic database queries. These extensions increase area by just 4 %, and the unified accelerator outperforms a multi-core software baseline by 1500 x.Finally, we show how to re-purpose these extensions to implement data structures like trees and hash tables that are critical to asymptotically optimal query plans. We introduce a threading model for vector dataflow accelerators that extracts parallelism from data structures with irregular control flow using fine-grained thread scheduling- outperforming a gpu by 8x.
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