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Speeding-up radio-frequency integrated circuit sizing with neural networks

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Speeding-up radio-frequency integrated circuit sizing with neural networks/ by João L. C. P. Domingues ... [et al.].
其他作者:	Domingues, João L. C. P.
出版者:	Cham :Springer International Publishing : : 2023.,
面頁冊數:	viii, 109 p. :ill. (chiefly col.), digital ;24 cm.
內容註:	Chapter 1. Introduction -- Chapter 2. Related Work: Machine Learning and Electronic Design Automation -- Chapter 3. Convergence Classifier & Frequency Guess Predictor based on ANNs -- Chapter 4. Process, Voltage and Temperature Corner Performance Estimator using ANNs -- Chapter 5. Conclusions.
Contained By:	Springer Nature eBook
標題:	Integrated circuits. -
電子資源:	https://doi.org/10.1007/978-3-031-25099-6
ISBN:	9783031250996

Speeding-up radio-frequency integrated circuit sizing with neural networks
Speeding-up radio-frequency integrated circuit sizing with neural networks[electronic resource] /by João L. C. P. Domingues ... [et al.]. - Cham :Springer International Publishing :2023. - viii, 109 p. :ill. (chiefly col.), digital ;24 cm. - SpringerBriefs in applied sciences and technology. Computational intelligence. - SpringerBriefs in applied sciences and technology.Computational intelligence..

Chapter 1. Introduction -- Chapter 2. Related Work: Machine Learning and Electronic Design Automation -- Chapter 3. Convergence Classifier & Frequency Guess Predictor based on ANNs -- Chapter 4. Process, Voltage and Temperature Corner Performance Estimator using ANNs -- Chapter 5. Conclusions.

In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the sizing task of RF IC design, which is used in two different steps of the automatic design process. The advances in telecommunications, such as the 5th generation broadband or 5G for short, open doors to advances in areas such as health care, education, resource management, transportation, agriculture and many other areas. Consequently, there is high pressure in today's market for significant communication rates, extensive bandwidths and ultralow-power consumption. This is where radiofrequency (RF) integrated circuits (ICs) come in hand, playing a crucial role. This demand stresses out the problem which resides in the remarkable difficulty of RF IC design in deep nanometric integration technologies due to their high complexity and stringent performances. Given the economic pressure for high quality yet cheap electronics and challenging time-to-market constraints, there is an urgent need for electronic design automation (EDA) tools to increase the RF designers' productivity and improve the quality of resulting ICs. In the last years, the automatic sizing of RF IC blocks in deep nanometer technologies has moved toward process, voltage and temperature (PVT)-inclusive optimizations to ensure their robustness. Each sizing solution is exhaustively simulated in a set of PVT corners, thus pushing modern workstations' capabilities to their limits. Standard ANNs applications usually exploit the model's capability of describing a complex, harder to describe, relation between input and target data. For that purpose, ANNs are a mechanism to bypass the process of describing the complex underlying relations between data by feeding it a significant number of previously acquired input/output data pairs that the model attempts to copy. Here, and firstly, the ANNs disrupt from the most recent trials of replacing the simulator in the simulation-based sizing with a machine/deep learning model, by proposing two different ANNs, the first classifies the convergence of the circuit for nominal and PVT corners, and the second predicts the oscillating frequencies for each case. The convergence classifier (CCANN) and frequency guess predictor (FGPANN) are seamlessly integrated into the simulation-based sizing loop, accelerating the overall optimization process. Secondly, a PVT regressor that inputs the circuit's sizing and the nominal performances to estimate the PVT corner performances via multiple parallel artificial neural networks is proposed. Two control phases prevent the optimization process from being misled by inaccurate performance estimates. As such, this book details the optimal description of the input/output data relation that should be fulfilled. The developed description is mainly reflected in two of the system's characteristics, the shape of the input data and its incorporation in the sizing optimization loop. An optimal description of these components should be such that the model should produce output data that fulfills the desired relation for the given training data once fully trained. Additionally, the model should be capable of efficiently generalizing the acquired knowledge in newer examples, i.e., never-seen input circuit topologies.

ISBN: 9783031250996

Standard No.: 10.1007/978-3-031-25099-6doiSubjects--Topical Terms:

584067
Integrated circuits.

LC Class. No.: TK7874

Dewey Class. No.: 621.3815

Speeding-up radio-frequency integrated circuit sizing with neural networks
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