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Gain- and offset-compensated switche...
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Ki, Wing-Hung.
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Gain- and offset-compensated switched-capacitor circuits.
Record Type:
Electronic resources : Monograph/item
Title/Author:
Gain- and offset-compensated switched-capacitor circuits./
Author:
Ki, Wing-Hung.
Published:
Ann Arbor : ProQuest Dissertations & Theses, : 1995,
Description:
314 p.
Notes:
Source: Dissertations Abstracts International, Volume: 57-04, Section: B.
Contained By:
Dissertations Abstracts International57-04B.
Subject:
Electrical engineering. -
Online resource:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=9541860
Gain- and offset-compensated switched-capacitor circuits.
Ki, Wing-Hung.
Gain- and offset-compensated switched-capacitor circuits.
- Ann Arbor : ProQuest Dissertations & Theses, 1995 - 314 p.
Source: Dissertations Abstracts International, Volume: 57-04, Section: B.
Thesis (Ph.D.)--University of California, Los Angeles, 1995.
This item must not be sold to any third party vendors.
An investigation of the application of gain- and offset-compensation (GOC) technique in switched-capacitor (SC) circuits in reducing three nonideal effects of the operational amplifiers, namely, finite DC gains, nonzero input offset voltages, and low-frequency noise, on the performance of the circuits is presented. Various analysis methods are developed for the above purpose. For filtering applications, a systematic methodology in designing conventional SC linear sections and biquads with minimum capacitor count based on bilinear transformation employing a 2-phase system clock is proposed. A canonical representation of second order transfer functions in the z-domain is discussed. Both signal flow graph technique and a systematic application of the Kirchhoff Charge Law are utilized to compute transfer functions of the SC circuits. An optimal capacitance assignment is introduced in maximizing the dynamic range of a biquad while simultaneously minimizing the total capacitance. Criteria for evaluating the performance of integrators, first order sections, and biquads, are derived, with examples illustrating the proposed technique. Gain- and offset-compensation (GOC) technique is introduced, which is also regarded as implementing correlated double sampling in a sampled-data system. GOC very-large-time-constant (VLT) circuits using T-cell and charge splitting techniques are presented. Charge differencing technique is introduced to further enhance area efficiency. Noise analysis and simulation are performed. VLT Nagaraj and GOC linear sections and biquads are built with discrete components and measurements are conducted. Both GOC and VLT techniques are applied to the design of an 8th order Bessel-Chebyshev lowpass filter. Simulation and measurement results are presented. For non-filtering applications, building blocks such as gain stages, delay elements, modulators, and differentiators utilizing the GOC technique are discussed. Some novel circuits are introduced, and methods of comparing the performance of these circuits are suggested. Design of operational amplifiers are central to the performance of switched-capacitor circuits. This research extends an in-depth investigation on the classic two-stage topology, aspects such as methods of compensation, effect of pole-splitting, and transient responses, are discussed.Subjects--Topical Terms:
649834
Electrical engineering.
Subjects--Index Terms:
VLT circuits
Gain- and offset-compensated switched-capacitor circuits.
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An investigation of the application of gain- and offset-compensation (GOC) technique in switched-capacitor (SC) circuits in reducing three nonideal effects of the operational amplifiers, namely, finite DC gains, nonzero input offset voltages, and low-frequency noise, on the performance of the circuits is presented. Various analysis methods are developed for the above purpose. For filtering applications, a systematic methodology in designing conventional SC linear sections and biquads with minimum capacitor count based on bilinear transformation employing a 2-phase system clock is proposed. A canonical representation of second order transfer functions in the z-domain is discussed. Both signal flow graph technique and a systematic application of the Kirchhoff Charge Law are utilized to compute transfer functions of the SC circuits. An optimal capacitance assignment is introduced in maximizing the dynamic range of a biquad while simultaneously minimizing the total capacitance. Criteria for evaluating the performance of integrators, first order sections, and biquads, are derived, with examples illustrating the proposed technique. Gain- and offset-compensation (GOC) technique is introduced, which is also regarded as implementing correlated double sampling in a sampled-data system. GOC very-large-time-constant (VLT) circuits using T-cell and charge splitting techniques are presented. Charge differencing technique is introduced to further enhance area efficiency. Noise analysis and simulation are performed. VLT Nagaraj and GOC linear sections and biquads are built with discrete components and measurements are conducted. Both GOC and VLT techniques are applied to the design of an 8th order Bessel-Chebyshev lowpass filter. Simulation and measurement results are presented. For non-filtering applications, building blocks such as gain stages, delay elements, modulators, and differentiators utilizing the GOC technique are discussed. Some novel circuits are introduced, and methods of comparing the performance of these circuits are suggested. Design of operational amplifiers are central to the performance of switched-capacitor circuits. This research extends an in-depth investigation on the classic two-stage topology, aspects such as methods of compensation, effect of pole-splitting, and transient responses, are discussed.
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http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=9541860
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