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Network-on-chip security and privacy

Mishra, Prabhat.

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Network-on-chip security and privacy

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Network-on-chip security and privacy/ edited by Prabhat Mishra, Subodha Charles.
其他作者:	Mishra, Prabhat.
出版者:	Cham :Springer International Publishing : : 2021.,
面頁冊數:	xii, 496 p. :ill., digital ;24 cm.
內容註:	Introduction to System-on-Chip Design using Network-on-Chip -- Network-on-Chip Security Challenges due to Supply Chain -- Characterizing and Optimizing Performance in NoC Architectures -- Characterizing and Optimizing Energy in NoC Architectures -- Modeling NoC in Architectural Simulators -- Eavesdropping Attacks -- Data Integrity Attacks -- Denial-of-Service Attacks -- Side-Channel Attacks -- Emerging Security Vulnerabilities in NoC-based SoCs -- Lightweight Encryption and authentication in NoC-based SoCs -- Trust-aware Routing in NoC-based SoCs -- Route and Data Randomization in NoC-based SoCs -- Mitigating Side-Channel Attacks in NoC-based SoCs -- Real-time Detection and Localization of DoS attacks -- Digital Watermarking for Detecting Malicious IP Cores -- Authorization for NoC Resource Accesses -- Formal Verification of NoC Security Properties -- NoC Trust Verification using Security Assertions -- Securing Optical/Photonic NoC -- Securing Wireless NoC -- Securing 2.5 and 3D NoC -- Future of Trustworthy On-Chip Communication -- Conclusions and Future Directions.
Contained By:	Springer Nature eBook
標題:	Networks on a chip - Security measures. -
電子資源:	https://doi.org/10.1007/978-3-030-69131-8
ISBN:	9783030691318

Network-on-chip security and privacy
Network-on-chip security and privacy[electronic resource] /edited by Prabhat Mishra, Subodha Charles. - Cham :Springer International Publishing :2021. - xii, 496 p. :ill., digital ;24 cm.

Introduction to System-on-Chip Design using Network-on-Chip -- Network-on-Chip Security Challenges due to Supply Chain -- Characterizing and Optimizing Performance in NoC Architectures -- Characterizing and Optimizing Energy in NoC Architectures -- Modeling NoC in Architectural Simulators -- Eavesdropping Attacks -- Data Integrity Attacks -- Denial-of-Service Attacks -- Side-Channel Attacks -- Emerging Security Vulnerabilities in NoC-based SoCs -- Lightweight Encryption and authentication in NoC-based SoCs -- Trust-aware Routing in NoC-based SoCs -- Route and Data Randomization in NoC-based SoCs -- Mitigating Side-Channel Attacks in NoC-based SoCs -- Real-time Detection and Localization of DoS attacks -- Digital Watermarking for Detecting Malicious IP Cores -- Authorization for NoC Resource Accesses -- Formal Verification of NoC Security Properties -- NoC Trust Verification using Security Assertions -- Securing Optical/Photonic NoC -- Securing Wireless NoC -- Securing 2.5 and 3D NoC -- Future of Trustworthy On-Chip Communication -- Conclusions and Future Directions.

This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems. Provides a comprehensive overview of NoC security vulnerabilities for diverse on-chip communication architectures, including bus, mesh, ring, star, and hybrid network topologies; Describes state-of-the-art security solutions for defending against a wide spectrum of attacks, including malicious implants (e.g., hardware Trojans), eavesdropping, information leakage, spoofing, denial-of-service, and erroneous execution; Covers a wide variety of NoC attacks and effective countermeasures for diverse communication technologies, including electrical, optical (photonic) and wireless NoCs; Presents lightweight static (design-for-trust), as well as dynamic (runtime) security solutions; Enables security validation using an effective combination of formal methods, assertion-based validation, side-channel analysis, and machine learning; Discusses trade-offs between on-chip communication security and energy-efficient implementation in resource constrained embedded systems and IoT devices.

ISBN: 9783030691318

Standard No.: 10.1007/978-3-030-69131-8doiSubjects--Topical Terms:

3494431
Networks on a chip
--Security measures.

LC Class. No.: TK5105.546 / .N489 2021

Dewey Class. No.: 006.22

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505 0 $a Introduction to System-on-Chip Design using Network-on-Chip -- Network-on-Chip Security Challenges due to Supply Chain -- Characterizing and Optimizing Performance in NoC Architectures -- Characterizing and Optimizing Energy in NoC Architectures -- Modeling NoC in Architectural Simulators -- Eavesdropping Attacks -- Data Integrity Attacks -- Denial-of-Service Attacks -- Side-Channel Attacks -- Emerging Security Vulnerabilities in NoC-based SoCs -- Lightweight Encryption and authentication in NoC-based SoCs -- Trust-aware Routing in NoC-based SoCs -- Route and Data Randomization in NoC-based SoCs -- Mitigating Side-Channel Attacks in NoC-based SoCs -- Real-time Detection and Localization of DoS attacks -- Digital Watermarking for Detecting Malicious IP Cores -- Authorization for NoC Resource Accesses -- Formal Verification of NoC Security Properties -- NoC Trust Verification using Security Assertions -- Securing Optical/Photonic NoC -- Securing Wireless NoC -- Securing 2.5 and 3D NoC -- Future of Trustworthy On-Chip Communication -- Conclusions and Future Directions.
520 $a This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems. Provides a comprehensive overview of NoC security vulnerabilities for diverse on-chip communication architectures, including bus, mesh, ring, star, and hybrid network topologies; Describes state-of-the-art security solutions for defending against a wide spectrum of attacks, including malicious implants (e.g., hardware Trojans), eavesdropping, information leakage, spoofing, denial-of-service, and erroneous execution; Covers a wide variety of NoC attacks and effective countermeasures for diverse communication technologies, including electrical, optical (photonic) and wireless NoCs; Presents lightweight static (design-for-trust), as well as dynamic (runtime) security solutions; Enables security validation using an effective combination of formal methods, assertion-based validation, side-channel analysis, and machine learning; Discusses trade-offs between on-chip communication security and energy-efficient implementation in resource constrained embedded systems and IoT devices.
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