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Technology mapping for LUT-based FPGA

Kubica, Marcin.

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Technology mapping for LUT-based FPGA

Record Type:	Electronic resources : Monograph/item
Title/Author:	Technology mapping for LUT-based FPGA/ by Marcin Kubica, Adam Opara, Dariusz Kania.
Author:	Kubica, Marcin.
other author:	Opara, Adam.
Published:	Cham :Springer International Publishing : : 2021.,
Description:	ix, 207 p. :ill. (some col.), digital ;24 cm.
[NT 15003449]:	Introduction -- Methods for representing Boolean Functions - basic definitions -- Binary decision diagrams (BDD) -- Theoretical basis of decomposition -- Decomposition of functions described using BDD -- Ordering variables in BDD diagrams -- Nondisjoint decomposition -- Decomposition of multioutput functions described using BDD -- Partial sharing of logic resources -- Ability of the configuration of configurable logic blocks.
Contained By:	Springer Nature eBook
Subject:	Field programmable gate arrays. -
Online resource:	https://doi.org/10.1007/978-3-030-60488-2
ISBN:	9783030604882

Technology mapping for LUT-based FPGA
Kubica, Marcin.

Technology mapping for LUT-based FPGA[electronic resource] /by Marcin Kubica, Adam Opara, Dariusz Kania. - Cham :Springer International Publishing :2021. - ix, 207 p. :ill. (some col.), digital ;24 cm. - Lecture notes in electrical engineering,v.7131876-1100 ;. - Lecture notes in electrical engineering ;v.713..

Introduction -- Methods for representing Boolean Functions - basic definitions -- Binary decision diagrams (BDD) -- Theoretical basis of decomposition -- Decomposition of functions described using BDD -- Ordering variables in BDD diagrams -- Nondisjoint decomposition -- Decomposition of multioutput functions described using BDD -- Partial sharing of logic resources -- Ability of the configuration of configurable logic blocks.

This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book.

ISBN: 9783030604882

Standard No.: 10.1007/978-3-030-60488-2doiSubjects--Topical Terms:

666370
Field programmable gate arrays.

LC Class. No.: TK7895.G36 / K83 2021

Dewey Class. No.: 621.395

Technology mapping for LUT-based FPGA
LDR:02480nmm a2200337 a 4500 001 2236356
003 DE-He213
005 20201107203256.0
006 m d
007 cr nn 008maaau
008 211111s2021 sz s 0 eng d
020 $a 9783030604882 $q (electronic bk.)
020 $a 9783030604875 $q (paper)
024 7 $a 10.1007/978-3-030-60488-2 $2 doi
035 $a 978-3-030-60488-2
040 $a GP $c GP $e rda
041 0 $a eng
050 4 $a TK7895.G36 $b K83 2021
072 7 $a TJFN $2 bicssc
072 7 $a TEC024000 $2 bisacsh
072 7 $a TJFN $2 thema
082 0 4 $a 621.395 $2 23
090 $a TK7895.G36 $b K95 2021
100 1 $a Kubica, Marcin. $3 3487674
245 1 0 $a Technology mapping for LUT-based FPGA $h [electronic resource] / $c by Marcin Kubica, Adam Opara, Dariusz Kania.
260 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2021.
300 $a ix, 207 p. : $b ill. (some col.), digital ; $c 24 cm.
490 1 $a Lecture notes in electrical engineering, $x 1876-1100 ; $v v.713
505 0 $a Introduction -- Methods for representing Boolean Functions - basic definitions -- Binary decision diagrams (BDD) -- Theoretical basis of decomposition -- Decomposition of functions described using BDD -- Ordering variables in BDD diagrams -- Nondisjoint decomposition -- Decomposition of multioutput functions described using BDD -- Partial sharing of logic resources -- Ability of the configuration of configurable logic blocks.
520 $a This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book.
650 0 $a Field programmable gate arrays. $3 666370
650 0 $a Programmable array logic. $3 652191
650 0 $a Gate array circuits. $3 652190
650 1 4 $a Microwaves, RF and Optical Engineering. $3 893985
650 2 4 $a Circuits and Systems. $3 896527
700 1 $a Opara, Adam. $3 3487675
700 1 $a Kania, Dariusz. $3 3487676
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer Nature eBook
830 0 $a Lecture notes in electrical engineering ; $v v.713. $3 3487677
856 4 0 $u https://doi.org/10.1007/978-3-030-60488-2
950 $a Engineering (SpringerNature-11647)