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The art of timing closure = advanced...
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Golshan, Khosrow.
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The art of timing closure = advanced ASIC design implementation /
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
The art of timing closure/ by Khosrow Golshan.
其他題名:
advanced ASIC design implementation /
作者:
Golshan, Khosrow.
出版者:
Cham :Springer International Publishing : : 2020.,
面頁冊數:
xix, 204 p. :ill., digital ;24 cm.
內容註:
Chapter 1. Introduction -- Chapter 2. Design Implementation Data Structures and Settings -- Chapter 3. Design Constraints Development -- Chapter 4. Multiple Modes and Multiple Corners Development -- Chapter 5. Concurrent Floor Planning and Placement -- Chapter 6. Placement and Timing Analysis -- Chapter 7. Clock Tree Synthesis and Timing Analysis -- Chapter 8. Detail Route and Timing, Power Analysis -- Chapter 9. Final Route and Timing Closure in all Modes and Corners -- Chapter 10. Functional and Physical Verification.
Contained By:
Springer Nature eBook
標題:
Application-specific integrated circuits. -
電子資源:
https://doi.org/10.1007/978-3-030-49636-4
ISBN:
9783030496364
The art of timing closure = advanced ASIC design implementation /
Golshan, Khosrow.
The art of timing closure
advanced ASIC design implementation /[electronic resource] :by Khosrow Golshan. - Cham :Springer International Publishing :2020. - xix, 204 p. :ill., digital ;24 cm.
Chapter 1. Introduction -- Chapter 2. Design Implementation Data Structures and Settings -- Chapter 3. Design Constraints Development -- Chapter 4. Multiple Modes and Multiple Corners Development -- Chapter 5. Concurrent Floor Planning and Placement -- Chapter 6. Placement and Timing Analysis -- Chapter 7. Clock Tree Synthesis and Timing Analysis -- Chapter 8. Detail Route and Timing, Power Analysis -- Chapter 9. Final Route and Timing Closure in all Modes and Corners -- Chapter 10. Functional and Physical Verification.
ISBN: 9783030496364
Standard No.: 10.1007/978-3-030-49636-4doiSubjects--Topical Terms:
1000335
Application-specific integrated circuits.
LC Class. No.: TK7874.6 / .G65 2020
Dewey Class. No.: 621.3815
The art of timing closure = advanced ASIC design implementation /
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Chapter 1. Introduction -- Chapter 2. Design Implementation Data Structures and Settings -- Chapter 3. Design Constraints Development -- Chapter 4. Multiple Modes and Multiple Corners Development -- Chapter 5. Concurrent Floor Planning and Placement -- Chapter 6. Placement and Timing Analysis -- Chapter 7. Clock Tree Synthesis and Timing Analysis -- Chapter 8. Detail Route and Timing, Power Analysis -- Chapter 9. Final Route and Timing Closure in all Modes and Corners -- Chapter 10. Functional and Physical Verification.
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