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Acceleration of Machine Learning Alg...

Neshatpour, Katayoun.

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Acceleration of Machine Learning Algorithms for Big Data Applications.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Acceleration of Machine Learning Algorithms for Big Data Applications./
Author:	Neshatpour, Katayoun.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2018,
Description:	187 p.
Notes:	Source: Dissertations Abstracts International, Volume: 80-09, Section: B.
Contained By:	Dissertations Abstracts International80-09B.
Subject:	Computer Engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=13420481
ISBN:	9780438887251

Acceleration of Machine Learning Algorithms for Big Data Applications.
Neshatpour, Katayoun.

Acceleration of Machine Learning Algorithms for Big Data Applications. - Ann Arbor : ProQuest Dissertations & Theses, 2018 - 187 p.

Source: Dissertations Abstracts International, Volume: 80-09, Section: B.

Thesis (Ph.D.)--George Mason University, 2018.

This item must not be sold to any third party vendors.

Advances in various branches of technology - data sensing, data communication, data computation, and data storage have significantly changed machine learning in recent years. With new computing technologies allowing vast amount of data to be stored and creating opportunities to learn from the aggregated data, implementation of classical machine-learning algorithms including K-means, KNN, has been improved to meet the big data requirements of such applications. Moreover, the enhanced processing power of today's computing nodes enables training of more sophisticated learning models, paving the way for deep learning algorithms including convolutional neural networks (CNN). In big data domain, various frameworks have been developed that allow the processing of large data sets with parallel and distributed algorithms, with MapReduce being an example of such frameworks. The first section of this research focuses on classical Machine-Learning applications and their hardware acceleration in MapReduce platform. Profiling of applications in this research shows that the map and/or reduce phase of these applications take up most of the execution time. Subsequently, the map functions were accelerated to evaluate how a cluster of CPUs equipped with FPGAs uses the accelerated mapper to enhance the overall performance of MapReduce. Moreover, this research studies how the type of FPGA (low-end vs. high-end), and its integration with the CPU (on-chip vs. off-chip) along with the choice of CPU (high performance big vs. low power little servers) affects the speedup yield and power reduction. While FPGA acceleration of MapReduce offers superior energy efficiency, but MapReduce platform is not suitable for implementation of deep neural networks including CNNs. In the second part of this research an iterative approach is proposed to break down large CNNs into a sequence of smaller networks (uCNN), each processing a sub-sample of the input image, providing the ability to terminate the classification early or carry the classification to the next iteration in case of non-satisfactory confidence levels. Moreover, the contextual information resulted from early iterations of ICNN can be used to reduce the complexity of the subsequent iterations. To explore the complexity-accuracy tradeoff of ICNN, a dynamic deadline-driven exit policy for real-time applications, a confidence thresholding policy for dynamic complexity reduction, a context-aware pruning policy for parameter reduction and two hybrid pruning and thresholding policies for simultaneous parameter and complexity reduction were introduced. Simulation results on a case study with iterative AlexNet shows that with intelligent selection of the pruning and/or thresholding policies, ICNN reduces the average FLOP and parameter counts, and execution time across 50K validation images in ImageNet database by more than 25%, 80% and 38%, respectively, with negligible accuracy loss. Moreover, the real-time systems could exploit the dynamic structure of the ICNN by reducing the execution time by upto 12x by trading off accuracy with execution time.

ISBN: 9780438887251Subjects--Topical Terms:

1567821
Computer Engineering.

Acceleration of Machine Learning Algorithms for Big Data Applications.
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300 $a 187 p.
500 $a Source: Dissertations Abstracts International, Volume: 80-09, Section: B.
500 $a Publisher info.: Dissertation/Thesis.
500 $a Advisor: Homayoun, Houman;Sasan, Avesta.
502 $a Thesis (Ph.D.)--George Mason University, 2018.
506 $a This item must not be sold to any third party vendors.
520 $a Advances in various branches of technology - data sensing, data communication, data computation, and data storage have significantly changed machine learning in recent years. With new computing technologies allowing vast amount of data to be stored and creating opportunities to learn from the aggregated data, implementation of classical machine-learning algorithms including K-means, KNN, has been improved to meet the big data requirements of such applications. Moreover, the enhanced processing power of today's computing nodes enables training of more sophisticated learning models, paving the way for deep learning algorithms including convolutional neural networks (CNN). In big data domain, various frameworks have been developed that allow the processing of large data sets with parallel and distributed algorithms, with MapReduce being an example of such frameworks. The first section of this research focuses on classical Machine-Learning applications and their hardware acceleration in MapReduce platform. Profiling of applications in this research shows that the map and/or reduce phase of these applications take up most of the execution time. Subsequently, the map functions were accelerated to evaluate how a cluster of CPUs equipped with FPGAs uses the accelerated mapper to enhance the overall performance of MapReduce. Moreover, this research studies how the type of FPGA (low-end vs. high-end), and its integration with the CPU (on-chip vs. off-chip) along with the choice of CPU (high performance big vs. low power little servers) affects the speedup yield and power reduction. While FPGA acceleration of MapReduce offers superior energy efficiency, but MapReduce platform is not suitable for implementation of deep neural networks including CNNs. In the second part of this research an iterative approach is proposed to break down large CNNs into a sequence of smaller networks (uCNN), each processing a sub-sample of the input image, providing the ability to terminate the classification early or carry the classification to the next iteration in case of non-satisfactory confidence levels. Moreover, the contextual information resulted from early iterations of ICNN can be used to reduce the complexity of the subsequent iterations. To explore the complexity-accuracy tradeoff of ICNN, a dynamic deadline-driven exit policy for real-time applications, a confidence thresholding policy for dynamic complexity reduction, a context-aware pruning policy for parameter reduction and two hybrid pruning and thresholding policies for simultaneous parameter and complexity reduction were introduced. Simulation results on a case study with iterative AlexNet shows that with intelligent selection of the pruning and/or thresholding policies, ICNN reduces the average FLOP and parameter counts, and execution time across 50K validation images in ImageNet database by more than 25%, 80% and 38%, respectively, with negligible accuracy loss. Moreover, the real-time systems could exploit the dynamic structure of the ICNN by reducing the execution time by upto 12x by trading off accuracy with execution time.
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