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Investigation of Electrical Properti...

Zhao, Peng.

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Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics./
Author:	Zhao, Peng.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2018,
Description:	152 p.
Notes:	Source: Dissertation Abstracts International, Volume: 80-03(E), Section: B.
Contained By:	Dissertation Abstracts International80-03B(E).
Subject:	Electrical engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=11004153
ISBN:	9780438578777

Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics.
Zhao, Peng.

Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics. - Ann Arbor : ProQuest Dissertations & Theses, 2018 - 152 p.

Source: Dissertation Abstracts International, Volume: 80-03(E), Section: B.

Thesis (Ph.D.)--The University of Texas at Dallas, 2018.

Recently, transition metal dichalcogenides (TMDs) have attracted intense attention due to their atomic layer-by-layer structure and unique electronic, optical and mechanical properties. Some of them, such as MoS2 and WSe2, have demonstrated satisfactory energy bandgap values and promising properties for future applications in electronics and optoelectronics. However, the relatively inert surface of these materials prevents the direct deposition of high-k dielectrics on these 2-D materials. Furthermore, capacitance-voltage (C-V) measurements of high-k dielectric on TMDs and interface defects analysis have not been researched sufficiently. In this dissertation, fabrication, electrical characterization, and simulation of top-gated few-layer TMD transistors are demonstrated with a major focus on interface property study of high-k/TMD. Top-gated capacitors on bulk MoS2 with 30 nm HfO2 and Al2O3 dielectrics are characterized with C-V and I-V measurements as the early work, showing the necessity of having a more robust test structure and an in-situ surface treatment to enable better interface assessment with quantitatively study. Top-gated few-layer MoS2 field effect transistors are fabricated using photolithographic patterning, with less than 10 nm thin ALD HfO2 on MoS2 after in-situ UV-O3 surface functionalization. C-V and I-V measurements are performed on these transistors. Interface defect density is extracted and analyzed from C-V measurement results. Annealing effects, such as cleaning effect of ultra-high vacuum annealing before high-k deposition, and N 2 or a forming gas anneal after device fabrication are demonstrated as well. As a comparison, Al2O3/MoS2 interface is also investigated with/without anneals, and the simulation work demonstrates the energetic and spatial distributions of the interface traps. Furthermore, border traps, which are the dielectric traps close to the high-k/MoS 2 interface, are studied based on electrical characterization and simulation, along with the interface traps. The methodologies of fabrication and characterization are also extended to MoSe2, to understand the high-k/MoSe 2 interface and annealing effects. The electrical characterization and analysis in this dissertation reveal the high-k/TMD interfacial properties, which potentially helps find the origins of those defects and ultimately improves the electrical performance of the TMD devices by passivating the defects.

ISBN: 9780438578777Subjects--Topical Terms:

649834
Electrical engineering.

Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics.
LDR:03444nmm a2200301 4500 001 2204632
005 20190716101637.5
008 201008s2018 ||||||||||||||||| ||eng d
020 $a 9780438578777
035 $a (MiAaPQ)AAI11004153
035 $a (MiAaPQ)0382vireo:719Zhao
035 $a AAI11004153
040 $a MiAaPQ $c MiAaPQ
100 1 $a Zhao, Peng. $3 1951064
245 1 0 $a Investigation of Electrical Properties of Transition Metal Dichalcogenides Transistors with High-K Dielectrics.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2018
300 $a 152 p.
500 $a Source: Dissertation Abstracts International, Volume: 80-03(E), Section: B.
500 $a Adviser: Chadwin D. Young.
502 $a Thesis (Ph.D.)--The University of Texas at Dallas, 2018.
520 $a Recently, transition metal dichalcogenides (TMDs) have attracted intense attention due to their atomic layer-by-layer structure and unique electronic, optical and mechanical properties. Some of them, such as MoS2 and WSe2, have demonstrated satisfactory energy bandgap values and promising properties for future applications in electronics and optoelectronics. However, the relatively inert surface of these materials prevents the direct deposition of high-k dielectrics on these 2-D materials. Furthermore, capacitance-voltage (C-V) measurements of high-k dielectric on TMDs and interface defects analysis have not been researched sufficiently. In this dissertation, fabrication, electrical characterization, and simulation of top-gated few-layer TMD transistors are demonstrated with a major focus on interface property study of high-k/TMD. Top-gated capacitors on bulk MoS2 with 30 nm HfO2 and Al2O3 dielectrics are characterized with C-V and I-V measurements as the early work, showing the necessity of having a more robust test structure and an in-situ surface treatment to enable better interface assessment with quantitatively study. Top-gated few-layer MoS2 field effect transistors are fabricated using photolithographic patterning, with less than 10 nm thin ALD HfO2 on MoS2 after in-situ UV-O3 surface functionalization. C-V and I-V measurements are performed on these transistors. Interface defect density is extracted and analyzed from C-V measurement results. Annealing effects, such as cleaning effect of ultra-high vacuum annealing before high-k deposition, and N 2 or a forming gas anneal after device fabrication are demonstrated as well. As a comparison, Al2O3/MoS2 interface is also investigated with/without anneals, and the simulation work demonstrates the energetic and spatial distributions of the interface traps. Furthermore, border traps, which are the dielectric traps close to the high-k/MoS 2 interface, are studied based on electrical characterization and simulation, along with the interface traps. The methodologies of fabrication and characterization are also extended to MoSe2, to understand the high-k/MoSe 2 interface and annealing effects. The electrical characterization and analysis in this dissertation reveal the high-k/TMD interfacial properties, which potentially helps find the origins of those defects and ultimately improves the electrical performance of the TMD devices by passivating the defects.
590 $a School code: 0382.
650 4 $a Electrical engineering. $3 649834
650 4 $a Materials science. $3 543314
690 $a 0544
690 $a 0794
710 2 $a The University of Texas at Dallas. $b Electrical Engineering. $3 1679269
773 0 $t Dissertation Abstracts International $g 80-03B(E).
790 $a 0382
791 $a Ph.D.
792 $a 2018
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=11004153