語系:
繁體中文
English
說明(常見問題)
回圖書館首頁
手機版館藏查詢
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
Quick start guide to Verilog
~
LaMeres, Brock J.
FindBook
Google Book
Amazon
博客來
Quick start guide to Verilog
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Quick start guide to Verilog/ by Brock J. LaMeres.
作者:
LaMeres, Brock J.
出版者:
Cham :Springer International Publishing : : 2019.,
面頁冊數:
xii, 190 p. :ill., digital ;24 cm.
內容註:
The Modern Digital Design Flow -- Verilog Constructs -- Modeling Concurrent Functionality in Verilog -- Structural Design and Hierarchy -- Modeling Sequential Functionality -- Test Benches -- Modeling Sequential Storage and Registers -- Modeling Finite State Machines -- Modeling Counters -- Modeling Memory -- Computer System Design.
Contained By:
Springer eBooks
標題:
Verilog (Computer hardware description language) -
電子資源:
https://doi.org/10.1007/978-3-030-10552-5
ISBN:
9783030105525
Quick start guide to Verilog
LaMeres, Brock J.
Quick start guide to Verilog
[electronic resource] /by Brock J. LaMeres. - Cham :Springer International Publishing :2019. - xii, 190 p. :ill., digital ;24 cm.
The Modern Digital Design Flow -- Verilog Constructs -- Modeling Concurrent Functionality in Verilog -- Structural Design and Hierarchy -- Modeling Sequential Functionality -- Test Benches -- Modeling Sequential Storage and Registers -- Modeling Finite State Machines -- Modeling Counters -- Modeling Memory -- Computer System Design.
This textbook provides a starter's guide to Verilog, to be used in conjunction with a one-semester course in Digital Systems Design, or on its own for readers who only need an introduction to the language. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to "do" after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome. Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation; Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book; Includes more than 200 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes.
ISBN: 9783030105525
Standard No.: 10.1007/978-3-030-10552-5doiSubjects--Topical Terms:
709274
Verilog (Computer hardware description language)
LC Class. No.: TK7885.7 / .L364 2019
Dewey Class. No.: 621.392
Quick start guide to Verilog
LDR
:02411nmm a2200325 a 4500
001
2179917
003
DE-He213
005
20190829170346.0
006
m d
007
cr nn 008maaau
008
191122s2019 gw s 0 eng d
020
$a
9783030105525
$q
(electronic bk.)
020
$a
9783030105518
$q
(paper)
024
7
$a
10.1007/978-3-030-10552-5
$2
doi
035
$a
978-3-030-10552-5
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7885.7
$b
.L364 2019
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
072
7
$a
TJFC
$2
thema
082
0 4
$a
621.392
$2
23
090
$a
TK7885.7
$b
.L228 2019
100
1
$a
LaMeres, Brock J.
$3
1086099
245
1 0
$a
Quick start guide to Verilog
$h
[electronic resource] /
$c
by Brock J. LaMeres.
260
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2019.
300
$a
xii, 190 p. :
$b
ill., digital ;
$c
24 cm.
505
0
$a
The Modern Digital Design Flow -- Verilog Constructs -- Modeling Concurrent Functionality in Verilog -- Structural Design and Hierarchy -- Modeling Sequential Functionality -- Test Benches -- Modeling Sequential Storage and Registers -- Modeling Finite State Machines -- Modeling Counters -- Modeling Memory -- Computer System Design.
520
$a
This textbook provides a starter's guide to Verilog, to be used in conjunction with a one-semester course in Digital Systems Design, or on its own for readers who only need an introduction to the language. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to "do" after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome. Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation; Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book; Includes more than 200 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes.
650
0
$a
Verilog (Computer hardware description language)
$3
709274
650
1 4
$a
Circuits and Systems.
$3
896527
650
2 4
$a
Processor Architectures.
$3
892680
650
2 4
$a
Logic Design.
$3
892735
710
2
$a
SpringerLink (Online service)
$3
836513
773
0
$t
Springer eBooks
856
4 0
$u
https://doi.org/10.1007/978-3-030-10552-5
950
$a
Engineering (Springer-11647)
筆 0 讀者評論
館藏地:
全部
電子資源
出版年:
卷號:
館藏
1 筆 • 頁數 1 •
1
條碼號
典藏地名稱
館藏流通類別
資料類型
索書號
使用類型
借閱狀態
預約狀態
備註欄
附件
W9369765
電子資源
11.線上閱覽_V
電子書
EB TK7885.7 .L364 2019
一般使用(Normal)
在架
0
1 筆 • 頁數 1 •
1
多媒體
評論
新增評論
分享你的心得
Export
取書館
處理中
...
變更密碼
登入