VLSI design and test for systems dep...
Asai, Shojiro.

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  • VLSI design and test for systems dependability
  • 紀錄類型: 書目-電子資源 : Monograph/item
    正題名/作者: VLSI design and test for systems dependability/ edited by Shojiro Asai.
    其他作者: Asai, Shojiro.
    出版者: Tokyo :Springer Japan : : 2019.,
    面頁冊數: xvii, 800 p. :ill., digital ;24 cm.
    內容註: Challenges and Opportunities in VLSI for Systems Dependability -- Design and Development of Electronic Systems for Quality and Dependability -- Radiation-Induced Soft Errors -- Electromagnetic Noises -- Variations in Device Characteristics -- Time-Dependent Degradation in Device Characteristics -- Connectivity in Wireless Telecommunications -- Connectivity in Electronic Packaging -- Responsiveness for Hard Real Time Control -- The Role of Security LSI and the Example of Malicious Attacks -- Verification and Test Coverage -- Unknown Threats and Provisions -- Design Automation for Reliability -- Formal Verification and Debugging of VLSI Logic Design for Systems Dependability:Experiments and Evaluation -- Virtualization: System-Level Fault Simulation of SRAM Errors in Automotive Electronic Control Systems -- DART - A Concept of In-Field Testing for Enhancing System De-pendability -- Design of SRAM Resilient against Dynamic Voltage Variations -- Design and Applications of Dependable Non-Volatile Memory Systems -- Network-on-Chip Based Multiple-Core Centrized ECUs for Safety-Critical Automotive Applications -- An On-Chip Router Architecture for Dependable Multicore Processor -- Wireless Interconnect in Electronic Systems -- Wireless Power Delivery Resilient against Loading Variations -- Extended Dependable Air: Use of Satellites in Boosting Dependability of PublicWireless Communications -- Responsive Multithreaded Processor for Hard Real-Time Robotic Applications -- A Low-Latency DMR Architecture with Fast Checkpoint Recovery Scheme Using Simultaneously Copyable SRAM -- A 3D-VLSI Architecture for Future Automotive Visual Recognition -- Applications of Reconfigurable Processors as Embedded Automatons in the IoT Sensor Networks in Space -- An FPGA Implementation of Comprehensive Security Functions for Systems-Level Authentication -- SRAM-Based Physically Unclonable Functions (PUFs) to Generate Signature out of Silicon for Authentication and Encryption.
    Contained By: Springer eBooks
    標題: Integrated circuits - Very large scale integration -
    電子資源: http://dx.doi.org/10.1007/978-4-431-56594-9
    ISBN: 9784431565949
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