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Network systems design : = using net...

Comer, Douglas E.

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Network systems design : = using network processors : Intel IXP version /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Network systems design :/ Douglas E. Comer.
Reminder of title:	using network processors : Intel IXP version /
Author:	Comer, Douglas E.
Published:	Upper Saddle River, N.J. :Pearson/Prentice Hall, : 2004.,
Description:	xxiv, 515 p. :ill ;25 cm.
Subject:	Data transmission systems - Congresses. -
ISBN:	0131417924

Network systems design : = using network processors : Intel IXP version /
Comer, Douglas E.

Network systems design :using network processors : Intel IXP version /Douglas E. Comer. - Upper Saddle River, N.J. :Pearson/Prentice Hall,2004. - xxiv, 515 p. :ill ;25 cm.

Includes bibliographical references (pages 497-500) and index

Introduction and overview --

ISBN: 0131417924Subjects--Topical Terms:

678599
Data transmission systems
--Congresses.

LC Class. No.: TK5105 / .C66 2004

Dewey Class. No.: 004.6/5

Network systems design : = using network processors : Intel IXP version /
LDR:01727cam 2200181Ia 4500 001 2168702
003 OCoLC
005 20160712072847.0
008 190621t20042004njua b 001 0 eng d
020 $a 0131417924 $q (hbk.)
020 $a 9780131417922 $q (hbk.)
040 $a OGE $b eng
050 # 0 $a TK5105 $b .C66 2004
082 0 0 $a 004.6/5 $2 22
100 1 $a Comer, Douglas E. $3 2259773
245 1 0 $a Network systems design : $b using network processors : Intel IXP version / $c Douglas E. Comer.
260 $a Upper Saddle River, N.J. : $b Pearson/Prentice Hall, $c 2004.
300 $a xxiv, 515 p. : $b ill ; $c 25 cm.
504 $a Includes bibliographical references (pages 497-500) and index
505 0 # $t Introduction and overview -- $t Basic terminology and example systems -- $t Review of protocols and packet formats -- $t Conventional computer hardware architecture -- $t Basic packet processing : algorithms and data structures -- $t Packet processing functions -- $t Protocol software on a conventional processor -- $t Hardware architectures for protocol processing -- $t Classification and forwarding -- $t Switching fabrics -- $t Network processors : motivation and purpose -- $t The complexity of network processor design -- $t Network processor architectures -- $t Issues in scaling a network processor -- $t Examples of commercial network processors -- $t Languages used for classification -- $t Design tradeoffs and consequences -- $t Overview of the intel network processor -- $t Embedded RISC processor (StrongARM core) -- $t Packet processor hardware (microengines and FBI) -- $t Reference system and software development kit (bridal veil, SDK) -- $t Programming model (ACE) -- $t ACE run-time structure and strongARM facilities -- $t Microengine programming I -- $t Microengine programming II -- $t An example ACE -- $t Intel's second generation processors.
650 # 0 $a Data transmission systems $x Congresses. $3 678599
650 # 0 $a System design $x Congresses. $3 661328
650 # 0 $a Internet $x Congresses. $3 570895
650 # 4 $a Computer network architectures $v Congresses. $3 1002160
650 # 4 $a Computer networks $x Equipment and supplies $x Design and construction. $3 3360530
650 # 4 $a Network processors. $3 590061