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Architectural Compensation Technique...

Maghari, Nima.

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Architectural Compensation Techniques for Analog Inaccuracies in DeltaSigma Analog-to-Digital Converters.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Architectural Compensation Techniques for Analog Inaccuracies in DeltaSigma Analog-to-Digital Converters./
作者:	Maghari, Nima.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2010,
面頁冊數:	126 p.
附註:	Source: Dissertation Abstracts International, Volume: 72-03, Section: B, page: 1680.
Contained By:	Dissertation Abstracts International72-03B.
標題:	Electrical engineering. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3441896
ISBN:	9781124463179

Architectural Compensation Techniques for Analog Inaccuracies in DeltaSigma Analog-to-Digital Converters.
Maghari, Nima.

Architectural Compensation Techniques for Analog Inaccuracies in DeltaSigma Analog-to-Digital Converters. - Ann Arbor : ProQuest Dissertations & Theses, 2010 - 126 p.

Source: Dissertation Abstracts International, Volume: 72-03, Section: B, page: 1680.

Thesis (Ph.D.)--Oregon State University, 2010.

Delta-sigma analog-to-digital converters (ADCs) are suitable for many applications due to several advantages such as relaxed anti-aliasing filter, high signal-to-noise and distortion ratio (SNDR) and most important of all, reduced sensitivity to analog imperfections. This thesis introduces several structures to overcome loop imperfections and stability issues in delta-sigma modulators. First, a new multi-loop delta-sigma modulator is proposed to combine the relaxed circuit requirements of single-loop modulators with the stability of traditional multi-loop modulators. Measurement results of the prototype IC confirmed with opamps with loop gain of less than 30dB, SNDR of over 74dB can be achieved. Also proposed is a new single-loop modulator using a delay-free two-step quantizer enabling the input signals beyond the full-scale range to be processed by the loop. The fabricated prototype IC achieves over 75dB SNDR by allowing signals up to +5dBFS input signals. Third, is a modified dual-slope ADC which achieves first-order quantization noise-shaping. Combined as the quantizer of a second-order delta-sigma loop, the fabricated prototype IC achieves third-order noise shaping with 78dB peak SNDR.

ISBN: 9781124463179Subjects--Topical Terms:

649834
Electrical engineering.

Architectural Compensation Techniques for Analog Inaccuracies in DeltaSigma Analog-to-Digital Converters.
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