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High -performance delta -sigma analo...

Silva, Jose Barreiro da.

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High -performance delta -sigma analog -to -digital converters.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	High -performance delta -sigma analog -to -digital converters./
作者:	Silva, Jose Barreiro da.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2004,
面頁冊數:	138 p.
附註:	Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4750.
Contained By:	Dissertation Abstracts International65-09B.
標題:	Electrical engineering. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3149069
ISBN:	9780496083619

High -performance delta -sigma analog -to -digital converters.
Silva, Jose Barreiro da.

High -performance delta -sigma analog -to -digital converters. - Ann Arbor : ProQuest Dissertations & Theses, 2004 - 138 p.

Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4750.

Thesis (Ph.D.)--Oregon State University, 2004.

Multi-stage delta-sigma (DeltaSigma) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However, inherent limitations in this type of converters have been addressed by the use of high-quality analog circuit components, making designs more complex, less robust, and higher performances difficult to achieve.

ISBN: 9780496083619Subjects--Topical Terms:

649834
Electrical engineering.

High -performance delta -sigma analog -to -digital converters.
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245 1 0 $a High -performance delta -sigma analog -to -digital converters.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2004
300 $a 138 p.
500 $a Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4750.
500 $a Advisers: Gabor C. Temes; Un-Ku Moon.
502 $a Thesis (Ph.D.)--Oregon State University, 2004.
520 $a Multi-stage delta-sigma (DeltaSigma) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However, inherent limitations in this type of converters have been addressed by the use of high-quality analog circuit components, making designs more complex, less robust, and higher performances difficult to achieve.
520 $a This thesis describes the problems of extending bandwidth without losing accuracy in DeltaSigma A/D converters, and presents three techniques which can overcome these problems: a low-distortion analog signal processing technique, the digital adaptive correction of analog circuit imperfections, and the fully digital estimation and correction of DAC errors. Combined, these techniques have the potential to achieve high-speed, high-resolution wideband DeltaSigma conversion, even with low-performance analog components.
520 $a The presented techniques were combined in a prototype chip, designed and fabricated in a 0.18 mum CMOS process. Simulation and preliminary measurement results show that they are highly effective.
590 $a School code: 0172.
650 4 $a Electrical engineering. $3 649834
690 $a 0544
710 2 $a Oregon State University. $3 625720
773 0 $t Dissertation Abstracts International $g 65-09B.
790 $a 0172
791 $a Ph.D.
792 $a 2004
793 $a English
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