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Trusted digital circuits = hardware ...

Salmani, Hassan.

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Trusted digital circuits = hardware trojan vulnerabilities, prevention and detection /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Trusted digital circuits/ by Hassan Salmani.
其他題名:	hardware trojan vulnerabilities, prevention and detection /
作者:	Salmani, Hassan.
出版者:	Cham :Springer International Publishing : : 2018.,
面頁冊數:	xi, 131 p. :ill., digital ;24 cm.
內容註:	The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack -- Circuit Vulnerabilities to Hardware Trojans at the Register Transfer Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Register Transfer Level -- Circuit Vulnerabilities to Hardware Trojans at the Gate Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level -- Circuit Vulnerabilities to Hardware Trojan at the Layout Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level -- Trusted Testing Techniques for Hardware Trojan Detection -- Hardware Trojans in Analog and Mixed-Signal Integrated Circuits.
Contained By:	Springer eBooks
標題:	Hardware Trojans (Computers) - Prevention. -
電子資源:	http://dx.doi.org/10.1007/978-3-319-79081-7
ISBN:	9783319790817

Trusted digital circuits = hardware trojan vulnerabilities, prevention and detection /
Salmani, Hassan.

Trusted digital circuitshardware trojan vulnerabilities, prevention and detection /[electronic resource] :by Hassan Salmani. - Cham :Springer International Publishing :2018. - xi, 131 p. :ill., digital ;24 cm.

The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack -- Circuit Vulnerabilities to Hardware Trojans at the Register Transfer Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Register Transfer Level -- Circuit Vulnerabilities to Hardware Trojans at the Gate Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level -- Circuit Vulnerabilities to Hardware Trojan at the Layout Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level -- Trusted Testing Techniques for Hardware Trojan Detection -- Hardware Trojans in Analog and Mixed-Signal Integrated Circuits.

This book describes the integrated circuit supply chain flow and discusses security issues across the flow, which can undermine the trustworthiness of final design. The author discusses and analyzes the complexity of the flow, along with vulnerabilities of digital circuits to malicious modifications (i.e. hardware Trojans) at the register-transfer level, gate level and layout level. Various metrics are discussed to quantify circuit vulnerabilities to hardware Trojans at different levels. Readers are introduced to design techniques for preventing hardware Trojan insertion and to facilitate hardware Trojan detection. Trusted testing is also discussed, enabling design trustworthiness at different steps of the integrated circuit design flow. Coverage also includes hardware Trojans in mixed-signal circuits. Provides a comprehensive vulnerability analysis across the integrated circuits design flow; Introduces security metrics to measure quantitatively the vulnerability of a circuit to hardware Trojan insertion; Describes design techniques to prevent hardware Trojan insertion and to facilitate hardware Trojan detection; Presents testing techniques for trustworthiness at each circuit level.

ISBN: 9783319790817

Standard No.: 10.1007/978-3-319-79081-7doiSubjects--Topical Terms:

3321493
Hardware Trojans (Computers)
--Prevention.

LC Class. No.: QA76.9.A25 / S256 2018

Dewey Class. No.: 005.8

Trusted digital circuits = hardware trojan vulnerabilities, prevention and detection /
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505 0 $a The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack -- Circuit Vulnerabilities to Hardware Trojans at the Register Transfer Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Register Transfer Level -- Circuit Vulnerabilities to Hardware Trojans at the Gate Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level -- Circuit Vulnerabilities to Hardware Trojan at the Layout Level -- Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level -- Trusted Testing Techniques for Hardware Trojan Detection -- Hardware Trojans in Analog and Mixed-Signal Integrated Circuits.
520 $a This book describes the integrated circuit supply chain flow and discusses security issues across the flow, which can undermine the trustworthiness of final design. The author discusses and analyzes the complexity of the flow, along with vulnerabilities of digital circuits to malicious modifications (i.e. hardware Trojans) at the register-transfer level, gate level and layout level. Various metrics are discussed to quantify circuit vulnerabilities to hardware Trojans at different levels. Readers are introduced to design techniques for preventing hardware Trojan insertion and to facilitate hardware Trojan detection. Trusted testing is also discussed, enabling design trustworthiness at different steps of the integrated circuit design flow. Coverage also includes hardware Trojans in mixed-signal circuits. Provides a comprehensive vulnerability analysis across the integrated circuits design flow; Introduces security metrics to measure quantitatively the vulnerability of a circuit to hardware Trojan insertion; Describes design techniques to prevent hardware Trojan insertion and to facilitate hardware Trojan detection; Presents testing techniques for trustworthiness at each circuit level.
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