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Languages, design methods, and tools...
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FDL (Conference) ((2016 :)
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Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /
Record Type:
Electronic resources : Monograph/item
Title/Author:
Languages, design methods, and tools for electronic system design/ edited by Franco Fummi, Robert Wille.
Reminder of title:
selected contributions from FDL 2016 /
remainder title:
FDL 2016
other author:
Fummi, Franco.
corporate name:
FDL (Conference)
Published:
Cham :Springer International Publishing : : 2018.,
Description:
vii, 116 p. :ill., digital ;24 cm.
[NT 15003449]:
Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
Contained By:
Springer eBooks
Subject:
Formal methods (Computer science) - Congresses. -
Online resource:
http://dx.doi.org/10.1007/978-3-319-62920-9
ISBN:
9783319629209
Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /
Languages, design methods, and tools for electronic system design
selected contributions from FDL 2016 /[electronic resource] :FDL 2016edited by Franco Fummi, Robert Wille. - Cham :Springer International Publishing :2018. - vii, 116 p. :ill., digital ;24 cm. - Lecture notes in electrical engineering,v.4541876-1100 ;. - Lecture notes in electrical engineering ;v.454..
Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
ISBN: 9783319629209
Standard No.: 10.1007/978-3-319-62920-9doiSubjects--Topical Terms:
622707
Formal methods (Computer science)
--Congresses.
LC Class. No.: QA76.9.F67
Dewey Class. No.: 621.3815
Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /
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Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
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Engineering (Springer-11647)
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W9340953
電子資源
11.線上閱覽_V
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EB QA76.9.F67
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