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Li, Weitao.

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High-resolution and high-speed integrated CMOS AD converters for low-power applications

Record Type:	Electronic resources : Monograph/item
Title/Author:	High-resolution and high-speed integrated CMOS AD converters for low-power applications/ by Weitao Li, Fule Li, Zhihua Wang.
Author:	Li, Weitao.
other author:	Li, Fule.
Published:	Cham :Springer International Publishing : : 2018.,
Description:	xiv, 171 p. :ill., digital ;24 cm.
[NT 15003449]:	Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.
Contained By:	Springer eBooks
Subject:	Analog-to-digital converters. -
Online resource:	http://dx.doi.org/10.1007/978-3-319-62012-1
ISBN:	9783319620121

High-resolution and high-speed integrated CMOS AD converters for low-power applications
Li, Weitao.

High-resolution and high-speed integrated CMOS AD converters for low-power applications[electronic resource] /by Weitao Li, Fule Li, Zhihua Wang. - Cham :Springer International Publishing :2018. - xiv, 171 p. :ill., digital ;24 cm. - Analog circuits and signal processing,1872-082X. - Analog circuits and signal processing..

Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.

This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

ISBN: 9783319620121

Standard No.: 10.1007/978-3-319-62012-1doiSubjects--Topical Terms:

649613
Analog-to-digital converters.

LC Class. No.: TK7887.6

Dewey Class. No.: 621.39814

High-resolution and high-speed integrated CMOS AD converters for low-power applications
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245 1 0 $a High-resolution and high-speed integrated CMOS AD converters for low-power applications $h [electronic resource] / $c by Weitao Li, Fule Li, Zhihua Wang.
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300 $a xiv, 171 p. : $b ill., digital ; $c 24 cm.
490 1 $a Analog circuits and signal processing, $x 1872-082X
505 0 $a Introduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.
520 $a This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
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