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Fundamentals of IP and SoC security ...

Bhunia, Swarup.

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Fundamentals of IP and SoC security = design, verification, and debug /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Fundamentals of IP and SoC security/ edited by Swarup Bhunia, Sandip Ray, Susmita Sur-Kolay.
其他題名:	design, verification, and debug /
其他作者:	Bhunia, Swarup.
出版者:	Cham :Springer International Publishing : : 2017.,
面頁冊數:	vi, 316 p. :ill., digital ;24 cm.
內容註:	Introduction -- Security Validation -- SoC Security and Debug -- IP Trust: The Problem and Design/Validation based Solution -- Security of Crypto IP Core: Issues and Countermeasures -- PUF-Based Authentication -- FPGA-based IP and SoC Security -- Physical Unclonable Functions and Intellectual Property Protection Techniques -- A Systematic Approach to Fault-Attack Resistant Design -- Hardware Trojan Attacks and Countermeasures -- In-place Logic Obfuscation for Emerging Nonvolatile FPGAs -- Security Standards for Embedded Devices and Systems -- Conclusion.
Contained By:	Springer eBooks
標題:	Computer security. -
電子資源:	http://dx.doi.org/10.1007/978-3-319-50057-7
ISBN:	9783319500577

Fundamentals of IP and SoC security = design, verification, and debug /
Fundamentals of IP and SoC securitydesign, verification, and debug /[electronic resource] :edited by Swarup Bhunia, Sandip Ray, Susmita Sur-Kolay. - Cham :Springer International Publishing :2017. - vi, 316 p. :ill., digital ;24 cm.

Introduction -- Security Validation -- SoC Security and Debug -- IP Trust: The Problem and Design/Validation based Solution -- Security of Crypto IP Core: Issues and Countermeasures -- PUF-Based Authentication -- FPGA-based IP and SoC Security -- Physical Unclonable Functions and Intellectual Property Protection Techniques -- A Systematic Approach to Fault-Attack Resistant Design -- Hardware Trojan Attacks and Countermeasures -- In-place Logic Obfuscation for Emerging Nonvolatile FPGAs -- Security Standards for Embedded Devices and Systems -- Conclusion.

This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the "trenches" of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.

ISBN: 9783319500577

Standard No.: 10.1007/978-3-319-50057-7doiSubjects--Topical Terms:

540555
Computer security.

LC Class. No.: QA76.9.A25

Dewey Class. No.: 005.8

Fundamentals of IP and SoC security = design, verification, and debug /
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505 0 $a Introduction -- Security Validation -- SoC Security and Debug -- IP Trust: The Problem and Design/Validation based Solution -- Security of Crypto IP Core: Issues and Countermeasures -- PUF-Based Authentication -- FPGA-based IP and SoC Security -- Physical Unclonable Functions and Intellectual Property Protection Techniques -- A Systematic Approach to Fault-Attack Resistant Design -- Hardware Trojan Attacks and Countermeasures -- In-place Logic Obfuscation for Emerging Nonvolatile FPGAs -- Security Standards for Embedded Devices and Systems -- Conclusion.
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