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The dark side of silicon = energy ef...
~
Rahmani, Amir M.
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The dark side of silicon = energy efficient computing in the dark silicon era /
Record Type:
Electronic resources : Monograph/item
Title/Author:
The dark side of silicon/ edited by Amir M. Rahmani ... [et al.].
Reminder of title:
energy efficient computing in the dark silicon era /
other author:
Rahmani, Amir M.
Published:
Cham :Springer International Publishing : : 2017.,
Description:
vi, 347 p. :ill., digital ;24 cm.
[NT 15003449]:
Introduction -- Dark vs. Dim Silicon and Near-Threshold Computing -- The SiLago Solution: Architecture and Design Methods for a Heterogeneous Dark Silicon aware Coarse Grain Reconfigurable Fabric -- Heterogeneous Dark Silicon Chip Multi-Processors Design and Run-time Management -- Thermal Safe Power (TSP) - Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon -- Power Management of Asymmetric Multi-Cores in the Dark Silicon Era -- Multi-Objective Power Management for CMPs in the Dark Silicon Age -- Robust Application Scheduling with Adaptive Parallelism in Dark-Silicon Constrained Multicore Systems -- Dark Silicon Patterning: Efficient Power Utilization through Run-time Mapping -- Online Software-Based Self-Testing in the Dark Silicon Era -- Adroit Use of Dark Silicon for Power, Performance and Reliability Optimization of NoCs -- NoC-aware Computational Sprinting.
Contained By:
Springer eBooks
Subject:
Integrated circuits - Design and construction. -
Online resource:
http://dx.doi.org/10.1007/978-3-319-31596-6
ISBN:
9783319315966
The dark side of silicon = energy efficient computing in the dark silicon era /
The dark side of silicon
energy efficient computing in the dark silicon era /[electronic resource] :edited by Amir M. Rahmani ... [et al.]. - Cham :Springer International Publishing :2017. - vi, 347 p. :ill., digital ;24 cm.
Introduction -- Dark vs. Dim Silicon and Near-Threshold Computing -- The SiLago Solution: Architecture and Design Methods for a Heterogeneous Dark Silicon aware Coarse Grain Reconfigurable Fabric -- Heterogeneous Dark Silicon Chip Multi-Processors Design and Run-time Management -- Thermal Safe Power (TSP) - Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon -- Power Management of Asymmetric Multi-Cores in the Dark Silicon Era -- Multi-Objective Power Management for CMPs in the Dark Silicon Age -- Robust Application Scheduling with Adaptive Parallelism in Dark-Silicon Constrained Multicore Systems -- Dark Silicon Patterning: Efficient Power Utilization through Run-time Mapping -- Online Software-Based Self-Testing in the Dark Silicon Era -- Adroit Use of Dark Silicon for Power, Performance and Reliability Optimization of NoCs -- NoC-aware Computational Sprinting.
This book presents the state-of-the art of one of the main concerns with microprocessors today, a phenomenon known as "dark silicon". Readers will learn how power constraints (both leakage and dynamic power) limit the extent to which large portions of a chip can be powered up at a given time, i.e. how much actual performance and functionality the microprocessor can provide. The authors describe their research toward the future of microprocessor development in the dark silicon era, covering a variety of important aspects of dark silicon-aware architectures including design, management, reliability, and test. Readers will benefit from specific recommendations for mitigating the dark silicon phenomenon, including energy-efficient, dedicated solutions and technologies to maximize the utilization and reliability of microprocessors. Enables readers to understand the dark silicon phenomenon and why it has emerged, including detailed analysis of its impacts; Presents state-of-the-art research, as well as tools for mitigating the dark silicon phenomenon; Includes coverage of various aspects of dark silicon awareness in design, management, reliability, and tests.
ISBN: 9783319315966
Standard No.: 10.1007/978-3-319-31596-6doiSubjects--Topical Terms:
658490
Integrated circuits
--Design and construction.
LC Class. No.: TK7874
Dewey Class. No.: 621.3815
The dark side of silicon = energy efficient computing in the dark silicon era /
LDR
:03037nmm a2200313 a 4500
001
2089152
003
DE-He213
005
20170627170059.0
006
m d
007
cr nn 008maaau
008
171013s2017 gw s 0 eng d
020
$a
9783319315966
$q
(electronic bk.)
020
$a
9783319315942
$q
(paper)
024
7
$a
10.1007/978-3-319-31596-6
$2
doi
035
$a
978-3-319-31596-6
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
TK7874
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
082
0 4
$a
621.3815
$2
23
090
$a
TK7874
$b
.D219 2017
245
0 4
$a
The dark side of silicon
$h
[electronic resource] :
$b
energy efficient computing in the dark silicon era /
$c
edited by Amir M. Rahmani ... [et al.].
260
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2017.
300
$a
vi, 347 p. :
$b
ill., digital ;
$c
24 cm.
505
0
$a
Introduction -- Dark vs. Dim Silicon and Near-Threshold Computing -- The SiLago Solution: Architecture and Design Methods for a Heterogeneous Dark Silicon aware Coarse Grain Reconfigurable Fabric -- Heterogeneous Dark Silicon Chip Multi-Processors Design and Run-time Management -- Thermal Safe Power (TSP) - Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon -- Power Management of Asymmetric Multi-Cores in the Dark Silicon Era -- Multi-Objective Power Management for CMPs in the Dark Silicon Age -- Robust Application Scheduling with Adaptive Parallelism in Dark-Silicon Constrained Multicore Systems -- Dark Silicon Patterning: Efficient Power Utilization through Run-time Mapping -- Online Software-Based Self-Testing in the Dark Silicon Era -- Adroit Use of Dark Silicon for Power, Performance and Reliability Optimization of NoCs -- NoC-aware Computational Sprinting.
520
$a
This book presents the state-of-the art of one of the main concerns with microprocessors today, a phenomenon known as "dark silicon". Readers will learn how power constraints (both leakage and dynamic power) limit the extent to which large portions of a chip can be powered up at a given time, i.e. how much actual performance and functionality the microprocessor can provide. The authors describe their research toward the future of microprocessor development in the dark silicon era, covering a variety of important aspects of dark silicon-aware architectures including design, management, reliability, and test. Readers will benefit from specific recommendations for mitigating the dark silicon phenomenon, including energy-efficient, dedicated solutions and technologies to maximize the utilization and reliability of microprocessors. Enables readers to understand the dark silicon phenomenon and why it has emerged, including detailed analysis of its impacts; Presents state-of-the-art research, as well as tools for mitigating the dark silicon phenomenon; Includes coverage of various aspects of dark silicon awareness in design, management, reliability, and tests.
650
0
$a
Integrated circuits
$x
Design and construction.
$3
658490
650
0
$a
Integrated circuits
$x
Materials.
$3
666711
650
1 4
$a
Engineering.
$3
586835
650
2 4
$a
Circuits and Systems.
$3
896527
650
2 4
$a
Processor Architectures.
$3
892680
650
2 4
$a
Electronic Circuits and Devices.
$3
1245773
700
1
$a
Rahmani, Amir M.
$3
3219507
710
2
$a
SpringerLink (Online service)
$3
836513
773
0
$t
Springer eBooks
856
4 0
$u
http://dx.doi.org/10.1007/978-3-319-31596-6
950
$a
Engineering (Springer-11647)
based on 0 review(s)
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W9315324
電子資源
11.線上閱覽_V
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EB TK7874
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