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Simulation of High-Frequency Scaling...
~
Bateman, James Daniel.
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Simulation of High-Frequency Scaling of Silicon MOSFETs and the Golden Transistor.
Record Type:
Electronic resources : Monograph/item
Title/Author:
Simulation of High-Frequency Scaling of Silicon MOSFETs and the Golden Transistor./
Author:
Bateman, James Daniel.
Description:
129 p.
Notes:
Source: Masters Abstracts International, Volume: 55-05.
Contained By:
Masters Abstracts International55-05(E).
Subject:
Electrical engineering. -
Online resource:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10129875
ISBN:
9781339877396
Simulation of High-Frequency Scaling of Silicon MOSFETs and the Golden Transistor.
Bateman, James Daniel.
Simulation of High-Frequency Scaling of Silicon MOSFETs and the Golden Transistor.
- 129 p.
Source: Masters Abstracts International, Volume: 55-05.
Thesis (M.A.S.)--University of Toronto (Canada), 2016.
This thesis investigates high-frequency scaling of advanced Silicon UTBB-FDSOI MOSFETs using semi-classical and ab initio NEGF simulations for the first time. Similarly, new ab initio NEGF simulations of the novel post-CMOS Au metal-channel FET are presented along side fabrication experiments towards testing simulation accuracy.
ISBN: 9781339877396Subjects--Topical Terms:
649834
Electrical engineering.
Simulation of High-Frequency Scaling of Silicon MOSFETs and the Golden Transistor.
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Simulation of High-Frequency Scaling of Silicon MOSFETs and the Golden Transistor.
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129 p.
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Source: Masters Abstracts International, Volume: 55-05.
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Adviser: Sorin P. Voinigescu.
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Thesis (M.A.S.)--University of Toronto (Canada), 2016.
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This thesis investigates high-frequency scaling of advanced Silicon UTBB-FDSOI MOSFETs using semi-classical and ab initio NEGF simulations for the first time. Similarly, new ab initio NEGF simulations of the novel post-CMOS Au metal-channel FET are presented along side fabrication experiments towards testing simulation accuracy.
520
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Ab initio NEGF simulations predict short channel effects to be suppressed down to LG=2nm, T Si=1.2nm, with improved ION by 80% and gm by 308% to compared to 24nm UTBB-FDSOI MOSFET measurements. Semi-classical simulations predict improvements of 46% in gm and 75% in fT for scaling down to LG=9.7nm, TSi =3.1nm.
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The Au METFET shows no significant ION/IOFF with results being sensitive to simulation model choice. A complete METFET fabrication process flow is presented to test simulation accuracy and the smallest metal channel width ever fabricated using EBL at the University of Toronto is demonstrated at 9nm.
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School code: 0779.
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http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10129875
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