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CMOS VCSEL driver circuit for 25+Gbp...

Shibata, Masumi.

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CMOS VCSEL driver circuit for 25+Gbps/channel short-reach parallel optical links.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	CMOS VCSEL driver circuit for 25+Gbps/channel short-reach parallel optical links./
作者:	Shibata, Masumi.
面頁冊數:	108 p.
附註:	Source: Masters Abstracts International, Volume: 55-03.
Contained By:	Masters Abstracts International55-03(E).
標題:	Electrical engineering. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1605658
ISBN:	9781339335483

CMOS VCSEL driver circuit for 25+Gbps/channel short-reach parallel optical links.
Shibata, Masumi.

CMOS VCSEL driver circuit for 25+Gbps/channel short-reach parallel optical links. - 108 p.

Source: Masters Abstracts International, Volume: 55-03.

Thesis (M.A.S.)--University of Toronto (Canada), 2015.

This thesis proposes a new CMOS driver for Vertical Cavity Surface Emitting LASER (VCSEL) diode arrays. A VCSEL is a promising light source for optical communication. However, its threshold voltage (1.5V for a 850-nm VCSEL) exceeds the rated supply voltage of nanoscale CMOS technologies. This makes difficult designing a driver sourcing a modulated current to a VCSELs anode directly, an arrangement suitable for low-cost parallel optical links. To overcome this problem, a combination of analog circuit techniques is proposed including a novel pad shield driving technique.

ISBN: 9781339335483Subjects--Topical Terms:

649834
Electrical engineering.

CMOS VCSEL driver circuit for 25+Gbps/channel short-reach parallel optical links.
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100 1 $a Shibata, Masumi. $3 3182201
245 1 0 $a CMOS VCSEL driver circuit for 25+Gbps/channel short-reach parallel optical links.
300 $a 108 p.
500 $a Source: Masters Abstracts International, Volume: 55-03.
500 $a Adviser: Anthony Chan Carusone.
502 $a Thesis (M.A.S.)--University of Toronto (Canada), 2015.
520 $a This thesis proposes a new CMOS driver for Vertical Cavity Surface Emitting LASER (VCSEL) diode arrays. A VCSEL is a promising light source for optical communication. However, its threshold voltage (1.5V for a 850-nm VCSEL) exceeds the rated supply voltage of nanoscale CMOS technologies. This makes difficult designing a driver sourcing a modulated current to a VCSELs anode directly, an arrangement suitable for low-cost parallel optical links. To overcome this problem, a combination of analog circuit techniques is proposed including a novel pad shield driving technique.
520 $a A prototype fabricated in a 65-nm CMOS technology achieved 26-Gb/s bit-rate and 1.80-pJ/b power efficiency with an optical modulation amplitude (OMA) of +1.8dBm and 3.1ps-rms jitter when driving a 850-nm 14Gb/s commercial VCSEL. This is the highest-speed anode-driving CMOS VCSEL driver reported to date. Also it has the best power efficiency and the smallest area (0:024 mm2) amongst anode-driving drivers in any process technology.
590 $a School code: 0779.
650 4 $a Electrical engineering. $3 649834
650 4 $a Optics. $3 517925
650 4 $a Multimedia communications. $3 590562
690 $a 0544
690 $a 0752
690 $a 0558
710 2 $a University of Toronto (Canada). $b Electrical and Computer Engineering. $3 2096349
773 0 $t Masters Abstracts International $g 55-03(E).
790 $a 0779
791 $a M.A.S.
792 $a 2015
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1605658