東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back

Switch To: Labeled | MARC Mode | ISBD

High performance integer arithmetic ...

Palchaudhuri, Ayan.

Linked to FindBook

Google Book

Amazon

博客來

High performance integer arithmetic circuit design on FPGA = architecture, implementation and design automation /

Record Type:	Electronic resources : Monograph/item
Title/Author:	High performance integer arithmetic circuit design on FPGA/ by Ayan Palchaudhuri, Rajat Subhra Chakraborty.
Reminder of title:	architecture, implementation and design automation /
Author:	Palchaudhuri, Ayan.
other author:	Chakraborty, Rajat Subhra.
Published:	New Delhi :Springer India : : 2016.,
Description:	xvii, 114 p. :ill., digital ;24 cm.
[NT 15003449]:	Introduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work.
Contained By:	Springer eBooks
Subject:	Field programmable gate arrays - Computer-aided design. -
Online resource:	http://dx.doi.org/10.1007/978-81-322-2520-1
ISBN:	9788132225201$q(electronic bk.)

High performance integer arithmetic circuit design on FPGA = architecture, implementation and design automation /
Palchaudhuri, Ayan.

High performance integer arithmetic circuit design on FPGAarchitecture, implementation and design automation /[electronic resource] :by Ayan Palchaudhuri, Rajat Subhra Chakraborty. - New Delhi :Springer India :2016. - xvii, 114 p. :ill., digital ;24 cm. - Springer series in advanced microelectronics,v.511437-0387 ;. - Springer series in advanced microelectronics ;33..

Introduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work.

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs) It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary "User Constraints File". The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation.

ISBN: 9788132225201$q(electronic bk.)

Standard No.: 10.1007/978-81-322-2520-1doiSubjects--Topical Terms:

867945
Field programmable gate arrays
--Computer-aided design.

LC Class. No.: TK7895.G36

Dewey Class. No.: 621.395

High performance integer arithmetic circuit design on FPGA = architecture, implementation and design automation /
LDR:03032nmm a2200325 a 4500 001 2028516
003 DE-He213
005 20160713141404.0
006 m d
007 cr nn 008maaau
008 160908s2016 ii s 0 eng d
020 $a 9788132225201$q(electronic bk.)
020 $a 9788132225195$q(paper)
024 7 $a 10.1007/978-81-322-2520-1 $2 doi
035 $a 978-81-322-2520-1
040 $a GP $c GP
041 0 $a eng
050 4 $a TK7895.G36
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
082 0 4 $a 621.395 $2 23
090 $a TK7895.G36 $b P155 2016
100 1 $a Palchaudhuri, Ayan. $3 2178962
245 1 0 $a High performance integer arithmetic circuit design on FPGA $h [electronic resource] : $b architecture, implementation and design automation / $c by Ayan Palchaudhuri, Rajat Subhra Chakraborty.
260 $a New Delhi : $b Springer India : $b Imprint: Springer, $c 2016.
300 $a xvii, 114 p. : $b ill., digital ; $c 24 cm.
490 1 $a Springer series in advanced microelectronics, $x 1437-0387 ; $v v.51
505 0 $a Introduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work.
520 $a This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs) It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary "User Constraints File". The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation.
650 0 $a Field programmable gate arrays $x Computer-aided design. $3 867945
650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 893838
650 2 4 $a Logic Design. $3 892735
700 1 $a Chakraborty, Rajat Subhra. $3 2108782
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer eBooks
830 0 $a Springer series in advanced microelectronics ; $v 33. $3 1565974
856 4 0 $u http://dx.doi.org/10.1007/978-81-322-2520-1
950 $a Engineering (Springer-11647)